ESMT
F49L160UA/F49L160BA
10.2 Program/Erase Operation
Table 15.
Symbol
Controlled Program/Erase Operations(TA = 0C to 70C, VCC = 2.7V~3.6V)
WE
-70
-90
Description
Unit
Min.
70
Max.
Min.
90
Max.
Write Cycle Time (Note 1)
Address Setup Time
Address Hold Time
Data Setup Time
ns
ns
ns
ns
ns
ns
t
WC
0
45
35
0
0
45
45
0
t
AS
AH
DS
DH
t
t
Data Hold Time
t
Output Enable Setup Time
Read Recovery Time Before
0
0
t
OES
0
0
ns
t
GHWL
Write (
High to
low)
WE
OE
Setup Time
Hold Time
0
0
0
0
ns
ns
ns
ns
CE
CE
t
CS
t
CH
Write Pulse Width
35
30
35
30
t
WP
Write Pulse Width High
t
WPH
Programming Operation
(Note 2)
Byte
9(typ.)
9(typ.)
us
t
t
WHWH1
WHWH2
Word
11(typ.)
11(typ.)
Sector Erase Operation (Note 2)
Setup Time (Note 1)
0.7(typ.)
0.7(typ.)
sec
us
50
0
50
0
t
V
CC
VCS
ns
Recovery Time from RY/
t
BY
RB
90
90
ns
Program/Erase Valid to RY/
Delay
BY
t
busy
Notes :
1. Not 100% tested.
2. See the "Erase and Programming Performance" section for more information.
Elite Semiconductor Memory Technology Inc.
Publication Date : Dec. 2006
Revision: 1.3 26/51
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
