EFST
7. FUNCTIONAL DESCRIPTION
7.1 Device operation
This section describes the requirements and use
of the device bus operations, which are initiated
through the internal command register. The
register is composed of latches that store the
command, address and data information needed
F49B002UA
to execute the command. The contents of the
register serve as inputs to the internal state
machine. The state machine outputs dictate the
function of the device. The F49B002UA features
various bus operations as Table 2.
Table 2. F49B002UA Operation Modes Selection
ADDRESS
DESCRIPTION
CE
OE
WE
A17 A12
|
|
A13 A10
A9
A8
|
A7
AIN
AIN
X
X
A6
A5
|
A2
A1 A0
DQ0~DQ7
Read
Write
Output Disable
Standby
Auto-select
Notes:
L
L
L
H
L
H
H
X
H
L
H
X
See Table 3
Dout
DIN
High Z
High Z
1.
L= Logic Low = V
IL
, H= Logic High = V
IH
, X= Don't Care, SA= Sector Address, AIN= Address In, DIN = Data In,
Dout = Data Out.
Table 3. F49B002UA Auto-Select Mode (High Voltage Method)
ADDRESS
DESCRIPTION
CE
OE
WE
DQ0~DQ7
A3
L
H
H
L
L
A2
H
L
H
L
L
A1
L
L
L
L
L
A0
L
L
L
L
H
7FH
7FH
7FH
8CH
00H
A17
|
A13
X
X
X
X
X
A12
|
A10
X
X
X
X
X
A9
V
ID
V
ID
V
ID
V
ID
V
ID
A8
|
A4
X
X
X
X
X
A6
X
X
X
X
X
L
(Manufacturer ID:EFST)
L
L
L
(Device ID: F49B002UA)
L
L
L
L
L
L
H
H
H
H
H
Notes :
1.Manufacturer and device codes may also be accessed via the software command sequence in Table 4.
2. V
ID
=11.5V to 12.5V.
Elite Flash Storage Technology Inc.
Publication Date : Sep. 2006
Revision: 1.4
4/33
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
