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F25L32QA-100PAG2S 参数 Datasheet PDF下载

F25L32QA-100PAG2S图片预览
型号: F25L32QA-100PAG2S
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 32MX1, PDSO8, 0.208 INCH, 1.27 MM PITCH, ROHS COMPLIANT, SOIC-8]
分类和应用: 时钟光电二极管内存集成电路
文件页数/大小: 51 页 / 411 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
F25L32QA (2S)  
Enter OTP Mode (ENSO)  
The ENSO (B1H) instruction is for entering the additional 512  
bytes secured OTP mode. The additional 512 bytes secured OTP  
sector is independent from main array, which may use to store  
unique serial number for system identifier. User must unprotect  
whole array (BP0=BP1=BP2=BP3=0), prior to any Program  
operation in OTP sector. After entering the secured OTP mode,  
only the secured OTP sector can be accessed and user can only  
follow the Read or Program procedure with OTP address range  
(address bits [A23 –A9] must be “0”). The secured OTP data  
cannot be updated again once it is lock down or has been  
programmed. In secured OTP mode, WRSR command will  
ignore the input data and lock down the secured OTP sector  
(OTP_lock bit =1). To exit secured OTP mode, user must  
execute WRDI command. RES can be used to verify the secured  
OTP status as shown in Table 6.  
Figure 23: Enter OTP Mode (ENSO) Sequence  
OTP Sector Address  
Size  
Address Range  
512 bytes  
000000H ~ 0001FFH  
Note: The OTP sector is an independent Sector.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Apr. 2013  
Revision: 1.7  
34/51  
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