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F25L08PA-100DG 参数 Datasheet PDF下载

F25L08PA-100DG图片预览
型号: F25L08PA-100DG
PDF下载: 下载PDF文件 查看货源
内容描述: 3V只有8兆位串行闪存,配有双 [3V Only 8 Mbit Serial Flash Memory with Dual]
分类和应用: 闪存
文件页数/大小: 32 页 / 489 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
F25L08PA  
Table 11: RECOMMENDED SYSTEM POWER-UP TIMINGS  
Symbol  
Parameter  
Minimum  
Unit  
µs  
1
TPU-READ  
VDD Min to Read Operation  
VDD Min to Write Operation  
10  
10  
1
TPU-WRITE  
µs  
Table 12: CAPACITANCE (TA = 25°C, f=1 MHz, other pins open)  
Parameter  
Description  
Test Condition  
VOUT = 0V  
Maximum  
12 pF  
1
COUT  
Output Pin Capacitance  
Input Capacitance  
1
CIN  
VIN = 0V  
6 pF  
Note 1: This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.  
Table 13: AC OPERATING CHARACTERISTICS  
Normal 33MHz Fast 50 MHz Fast 100 MHz  
Symbol  
Parameter  
Unit  
Min  
Max  
Min  
Max Min  
Max  
FCLK  
TSCKH  
TSCKL  
Serial Clock Frequency  
Serial Clock High Time  
Serial Clock Low Time  
33  
50  
100  
MHz  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
13  
13  
5
9
9
5
5
1
TCES  
5
5
CE Active Setup Time  
CE Active Hold Time  
CE Not Active Setup Time  
CE Not Active Hold Time  
CE High Time  
1
TCEH  
5
5
5
1
TCHS  
5
5
5
1
TCHH  
5
5
5
TCPH  
TCHZ  
TCLZ  
TDS  
100  
100  
100  
9
9
9
CE High to High-Z Output  
SCK Low to Low-Z Output  
Data In Setup Time  
0
3
3
5
5
5
5
0
3
3
5
5
5
5
0
3
TDH  
THLS  
THHS  
THLH  
THHH  
THZ  
Data In Hold Time  
3
5
HOLD Low Setup Time  
HOLD High Setup Time  
HOLD Low Hold Time  
5
5
5
HOLD High Hold Time  
9
9
9
9
9
HOLD Low to High-Z Output  
HOLD High to Low-Z Output  
Output Hold from SCK Change  
Output Valid from SCK  
TLZ  
9
TOH  
TV  
0
0
0
12  
8
7
Note 1: Relative to SCK.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Jul. 2009  
Revision: 1.7 23/32  
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