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F25L04UA-100CG 参数 Datasheet PDF下载

F25L04UA-100CG图片预览
型号: F25L04UA-100CG
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 512KX8, PDSO8, 0.150 INCH, LEAD FREE, SOIC-8]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 25 页 / 271 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
F25L04UA  
Sector-Erase  
The Sector-Erase instruction clears all bits in the selected sector  
to FFH. A Sector-Erase instruction applied to a protected  
memory area will be ignored. Prior to any Write operation, the  
[AMS-A12] (AMS = Most Significant address) are used to determine  
the sector address (SAX), remaining address bits can be VIL or  
VIH. CE must be driven high before the instruction is executed.  
The user may poll the Busy bit in the software status register or  
wait TSE for the completion of the internal self-timed  
Sector-Erase cycle. See Figure 8 for the Sector-Erase sequence.  
Write-Enable (WREN) instruction must be executed. CE must  
remain active low for the duration of the any command sequence.  
The Sector-Erase instruction is initiated by executing an 8-bit  
command, 20H, followed by address bits [A23-A0]. Address bits  
CE  
0
1 2  
3
4 5 6 7  
8
15 16  
23 24  
31 32  
MODE3  
MODE0  
39  
SCK  
SI  
02  
ADD.  
MSB  
ADD.  
ADD.  
DIN  
MSB  
HIGH IMPENANCE  
SO  
FIGURE 8 : SECTOR-ERASE SEQUENCE  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Jan. 2009  
Revision: 1.2 12/25