ESMT
F25L004A
4K-Byte-Sector-Erase
The Sector-Erase instruction clears all bits in the selected sector
to FFH. A Sector-Erase instruction applied to a protected
memory area will be ignored. Prior to any Write operation, the
[AMS-A12] (AMS = Most Significant address) are used to determine
the sector address (SAX), remaining address bits can be VIL or
VIH. CE must be driven high before the instruction is executed.
The user may poll the Busy bit in the software status register or
wait TSE for the completion of the internal self-timed
Sector-Erase cycle. See Figure 10 for the Sector-Erase
sequence.
Write-Enable (WREN) instruction must be executed. CE must
remain active low for the duration of the any command sequence.
The Sector-Erase instruction is initiated by executing an 8-bit
command, 20H, followed by address bits [A23-A0]. Address bits
CE
15 16
31
23 24
0
1
2
3
4 5 6 7 8
MODE3
MODE0
SCK
SI
20
ADD.
MSB
ADD.
ADD.
MSB
HIGH IMPENANCE
SO
FIGURE 10 : SEQUENCE-ERASE SEQUENCE
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2007
Revision: 1.2 16/32
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
