ESMT
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SRA
GNDSR
SRB
VDDSRB
Re set
PD
AD8356A
O
P
O
P
I
I
O
I
I
I
I
I
O
P
P
O
O
I
P
O
P
O
P
P
O
P
O
P
I
Subwoofer-right channel output (+)
Ground for subwoofer-right channel
Subwoofer-right channel output (-)
Supply for subwoofer-right channel B
Reset, low active
Power down, low active
ERROR output
I
2
C select address 0
I
2
C select address 1
I
2
C serial clock input
I
2
C serial data input
Default volume, 0=Mute, 1=Un-Mute
Half-bridge, sub-woofer channel output
Analog supply
Analog ground
Headphone right channel output
Headphone left channel output
Headphone detection
Supply for right channel B
Right channel output (-)
Ground for Right channel
Right channel output (+)
Supply for right channel A
Supply for left channel A
Left channel output (+)
Ground for left channel
Left channel output (-)
Supply for left channel B
PLL Bypass
(Note2)
Schmitt trigger TTL input buffer
(Note2)
(Note2)
(Note2)
(Note2)
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
Open-drain output
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer with
open-drain output
Schmitt trigger TTL input buffer
TTL output buffer
(Note1)
ERROR
SA0
SA1
SCL
SDA
DEF
PWMSA
AVDD
AGND
HPR
HPL
HP-SPK
VDDRB
RB
GNDR
RA
VDDRA
VDDLA
LA
GNDL
LB
VDDLB
PLL_Byp
Note1:These pins provide the supply for digital PWM controller, headphone drivers, built-in PLL and
protection circuits except for loudspeaker short-circuit protection circuits.
Note2:These pins provide the supply for loudspeaker driver stages, which are known as “PVDD”.
Elite Semiconductor Memory Technology Inc.
Publication Date: May. 2007
Revision: 1.3
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