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BMR4511002/XXXC 参数 Datasheet PDF下载

BMR4511002/XXXC图片预览
型号: BMR4511002/XXXC
PDF下载: 下载PDF文件 查看货源
内容描述: [DC-DC Regulated Power Supply Module,]
分类和应用:
文件页数/大小: 28 页 / 1840 K
品牌: ERICSSON [ ERICSSON ]
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E
5
Technical Specification  
EN/LZT 146 401 R4A May 2015  
BMR 451 Digital PoL Regulators  
Input 4.5-14 V, Output up to 40 A / 132 W  
© Ericsson AB  
Functional Specification  
TP1 = -40 to +85ºC, VI = 4.5 to 14 V  
Typical values given at: TP1 = +25°C, VI = 12 V, max IO, unless otherwise specified under Conditions  
Configuration File: 190 10-CDA 102 900/020  
Characteristics  
Conditions  
min  
typ  
max  
Unit  
SMBus monitoring  
VIN_READ, 0x88h  
VOUT_READ, 0x8Bh  
IOUT_READ, 0x8Ch  
Accuracy vs. VI  
Accuracy vs. VO  
Accuracy vs. IO  
-3  
-1  
3
1
%
%
%
-20  
20  
General Electrical Characteristics  
fs Switching frequency  
Factory default  
320  
10  
kHz  
pF  
CISMBus Internal capacitance  
CI Internal input capacitance  
Fault Protection Characteristics  
UVLO Threshold  
SMBus signals, SDA, SCL  
140  
µF  
4.0  
0.4  
V
mV  
V
Input Under  
Set point accuracy  
-100  
100  
2.5  
Voltage Lockout,  
Hysteresis  
UVLO  
Factory default  
Delay  
µs  
UVP threshold  
Factory default  
Factory default  
85  
% VOUT  
% VOUT  
(Output voltage)  
Over/Under  
Voltage Protection,  
OVP/UVP  
OVP threshold  
115  
OVP/UVP fault response  
time  
Factory default  
25  
µs  
Set point accuracy  
OCP threshold  
Io  
-20  
+20  
%
A
Over Current  
Protection,  
OCP  
Factory default  
50  
45  
OCP protection delay  
OTP threshold  
Factory default  
Factory default  
µs  
120  
15  
Over Temperature  
Protection,  
OTP at TP1  
°C  
OTP hysteresis  
Factory default  
Logic Input/Output Characteristics  
Logic input low threshold (VIL)  
Logic input high threshold (VIH)  
0.8  
0.4  
V
V
CTRL, SCL, SDA, FLEX  
2.0  
SALERT, SCL, SDA, FLEX  
Logic output low (VOL  
)
V
V
I
OL 4 mA  
SALERT, SCL, SDA, FLEX  
IOL -2 mA  
Logic output high (VOH  
)
2.25  
Setup time, SMBus (tset  
)
See Note 1  
See Note 1  
300  
250  
ns  
ns  
Hold time, SMBus (thold  
)
Note 1: See operation information section for I2C/SMBus Setup and Hold Times – Definitions  
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