欢迎访问ic37.com |
会员登录 免费注册
发布采购

S1D13506 参数 Datasheet PDF下载

S1D13506图片预览
型号: S1D13506
PDF下载: 下载PDF文件 查看货源
内容描述: S1D13506彩色LCD / CRT / TV控制器 [S1D13506 Color LCD/CRT/TV Controller]
分类和应用: 电视控制器
文件页数/大小: 696 页 / 5934 K
品牌: EPSON [ EPSON COMPANY ]
 浏览型号S1D13506的Datasheet PDF文件第212页浏览型号S1D13506的Datasheet PDF文件第213页浏览型号S1D13506的Datasheet PDF文件第214页浏览型号S1D13506的Datasheet PDF文件第215页浏览型号S1D13506的Datasheet PDF文件第217页浏览型号S1D13506的Datasheet PDF文件第218页浏览型号S1D13506的Datasheet PDF文件第219页浏览型号S1D13506的Datasheet PDF文件第220页  
Page 210  
Epson Research and Development  
Vancouver Design Center  
16 EPSON Independent Simultaneous Display (EISD)  
16.1 Introduction  
EPSON Independent Simultaneous Display (EISD) allows the S1D13506 to display  
independent images on two different displays (LCD panel and CRT or TV). The LCD panel  
timings and mode setup are programmed through the Panel Configuration Registers  
(REG[03Xh]) and the LCD Display Mode Registers (REG[04Xh]). The CRT/TV timings  
and mode setup are programmed through the CRT/TV Configuration Registers  
(REG[05Xh]) and the CRT/TV Display Mode Registers (REG[06Xh]). The Ink Layer or  
Hardware Cursor can also be independently controlled on the two displays. The LCD  
Ink/Cursor Registers (REG[07Xh]) control the Ink/Cursor on the LCD display; the  
CRT/TV Ink/Cursor Registers (REG[08Xh]) control the Ink/Cursor on the CRT or TV.  
Each display uses its own Look-Up Table (LUT), although there is only one set of LUT  
Registers (REG[1E0h], REG[1E2h], REG[1E4h]). Use the LUT Mode Register  
(REG[1E0h]) to select access to the LCD and/or CRT/TV LUTs.  
The pixel clock source for the two displays may also be independent. Use the Clock Config-  
uration Registers (REG[014h], REG[018h]) to select the LCD pixel clock source and the  
CRT/TV pixel clock source, respectively. Typically, CLKI2 is used for the CRT/TV  
display, while CLKI is used for the LCD display. Memory clock may come from CLKI or  
BUSCLK.  
To display different images on the LCD and CRT/TV, the two images should reside in non-  
overlapping areas of the display buffer, and the display start addresses point to the corre-  
sponding areas. The display buffer is mapped to the CPU address AB[20:0] linearly.  
Example 1: Assuming a 2M byte display buffer, the LCD image may locate in the first 1M  
byte of the display buffer (AB[20:0] = 000000h-0FFFFFh), and the CRT/TV  
image may locate in the second 1M byte of the display  
buffer (AB[20:0] = 100000h-1FFFFFh).  
The LCD and CRT/TV may display identical images by setting the display start addresses  
for the LCD and the CRT/TV to the same address. In this case only one image is needed in  
the display buffer. However, the display pipelines are still independent so the same image  
is fetched twice from the display buffer; once for the LCD refresh and once for the CRT/TV  
refresh.  
S1D13506  
X25B-A-001-10  
Hardware Functional Specification  
Issue Date: 01/02/06  
 复制成功!