epc110
Connection Diagrams
2 1
1 1
0 1
9
9
8
7
6
VDD33
EN
SI
LED
SCK
OUTN
SO
NC_GND
GND
NC_GND
LED/SCK
EN/SI
Top View
OUTH
10 VDD18
5
Top View
PD
NC_GND
NC_GND
VDD
1
GND
2
PD
3
CS
4
1
2
4
3
10-Pin Chip Scale Package (CSP)
16-Pin QFN Package
10-Pin
CSP
16-Pin Pin Name Type
QFN
Description
1
9
VDD
Power Supply
Positive power supply.
Operation mode: to be connect to VDD33.
During command PROG: to be connected to programming voltage.
2
3
4
7
6
4
GND
PD
Power Supply
Analog Input
Digital Input
Negative power supply pin.
Photo diode input.
CS
Terminated with internal pull up resistor
Light barrier:
Mode selection:
CS = 1: Operation Mode (LED, EN, OUTN active)
Chip select,
SPI interface:
CS = 0: Command/Program Mode (SCK, SI, SO active)
5
6
2
1
OUTH
Digital Output
Light reserve detected - see Figure 8.
Load depending Refer to section Light Reserve Output OUTH
Open drain output
OUTN
SO
Digital Output
Open drain output
Light barrier:
Light pulses detected, amplified and filtered signal
see Functional Description
SPI interface:
Serial data output
7
8
15
14
EN
SI
Digital Input
Terminated with internal pull up resistor
Light barrier:
Fork light barrier controlled mode:
LED pulse stimulation
No function.
Fork light barrier standalone mode:
Serial data input
SPI interface:
LED
SCK
Digital Output
Digital Input
Light barrier:
SPI interface:
Output to LED driver
Serial input/output clock.
For start/stop condition of SPI communication (while CS = 1):
Set SCK =1 and SCK line in tristate mode (high ohmic)
12
10
VDD33 Power Supply
VDD18 Decoupling
Positive power supply.
10
Pin for external filter/decoupling of the internal 1.8V supply: 4.7nF ceramic type
Not for supply of external circuits
n/a
3, 5, 8,
11, 13,
16
NC_GND
Not connected. Connect this pins to GND (Guarding).
© 2011 ESPROS Photonics Corporation
Characteristics subject to change without notice
5
Datasheet epc110 - V2.1
www.espros.ch