eorex
EM44AM1684LBA
Output Drive Strength
The output drive strength is defined by bit A1. Normal drive strength outputs are specified to be SSTL_18.
Programming bit A1 = 0 selects normal (100 %) drive strength for all outputs.
Programming bit A1 = 1 will reduce all outputs to approximately 60 % of the SSTL_18 drive strength.
This option is intended for the support of the lighter load and/or point-to-point environments.
Single-ended and Differential Data Strobe Signals
EMRS
Stobe Function Matrix
signals
RDQS
DM
A11
A10
/RDQS
DQS
/DQS
(RDQS Enable) (/DQS Enable)
DM
DM
Hi -Z
Hi -Z
DQS
DQS
DQS
DQS
/DQS
Hi -Z
/DQS
Hi -Z
differential DQS signals
single-ended DQS signals
0 ( Disable)
0 ( Disable)
0 ( Enable)
1 ( Disable)
0 ( Enable)
1 ( Disable)
1 ( Enable)
only for X8
RDQS /RDQS
RDQS Hi -Z
differential DQS signals (for X8)
single-ended DQS signals (for X8)
1 ( Enable)
only for X8
Output Disable ( Qoff )
Under normal operation, the DRAM outputs are enabled during Read operation for driving data (Qoff bit in
the EMRS(1) is set to (0). When the Qoff bit is set to 1, the DRAM outputs will be disabled. Disabling the
DRAM outputs allows users to measure IDD currents during Read operations, without including the output
buffer current.
Jul. 2006
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EOREX [ EOREX CORPORATION ]
