eorex
EM44AM1684LBA
Burst Type (A3)
Burst Length
A3 A2 A1 A0
Sequential Addressing
Interleave Addressing
0 1 2 3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0 1 2 3
1 2 3 0
1 0 3 2
4
2 3 0 1
2 3 0 1
3 0 1 2
3 2 1 0
0 1 2 3 4 5 6 7
1 2 3 4 5 6 7 0
2 3 4 5 6 7 0 1
3 4 5 6 7 0 1 2
4 5 6 7 0 1 2 3
5 6 7 0 1 2 3 4
6 7 0 1 2 3 4 5
7 0 1 2 3 4 5 6
0 1 2 3 4 5 6 7
1 0 3 2 5 4 7 6
2 3 0 1 6 7 4 5
3 2 1 0 7 6 5 4
4 5 6 7 0 1 2 3
5 4 7 6 1 0 3 2
6 7 4 5 2 3 0 1
7 6 5 4 3 2 1 0
8
* Page length is a function of I/O organization and column addressing
Write Recovery
WR (Write Recovery) is for Writes with Auto-Precharge only and defines the time
when the device starts pre-charge internally. WR must be programmed to match the minimum requirement
for the analogue tWR timing.
Power-Down Mode
Active power-down (PD) mode is defined by bit A12. PD mode allows the user to determine the active
power-down mode, which determines performance vs. power savings. PD mode bit A12 does not apply to
precharge power-down mode. When bit A12 = 0, standard Active Power-down mode or ‘fast-exit’ active
power-down mode is enabled. The tXARD parameter is used for ‘fast-exit’ active power-down exit timing.
The DLL is expected to be enabled and running during this mode.
When bit M12 = 1, a lower power active power-down mode or ‘slow-exit’ active power-down mode is
enabled. The tXARDS parameter is used for ‘slow-exit’ active power-down exit timing. The DLL can be
enabled, but ‘frozen’ during active power-down mode since the exit-to-READ command timing is relaxed.
The power difference expected between PD ‘normal’ and PD ‘low-power’ mode is defined in the IDD table.
Jul. 2006
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EOREX [ EOREX CORPORATION ]
