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EN25QH32-104QIP 参数 Datasheet PDF下载

EN25QH32-104QIP图片预览
型号: EN25QH32-104QIP
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆位串行闪存与4K字节扇区制服 [32 Megabit Serial Flash Memory with 4Kbyte Uniform Sector]
分类和应用: 闪存
文件页数/大小: 63 页 / 1168 K
品牌: EON [ EON SILICON SOLUTION INC. ]
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EN25QH32  
Quad Input / Output FAST_READ (EBh)  
The Quad Input/Output FAST_READ (EBh) instruction is similar to the Dual I/O Fast Read (BBh)  
instruction except that address and data bits are input and output through four pins, DQ0, DQ1, DQ2 and  
DQ3 and six dummy clocks are required prior to the data output. The Quad I/O dramatically reduces  
instruction overhead allowing faster random access for code execution (XIP) directly from the Quad SPI.  
The Quad Input/Output FAST_READ (EBh) instruction enable quad throughput of Serial Flash in read  
mode. In SPI mode, the QE bit needs to be assigned through WRSR to set to “1” before sending the  
SPI instruction Quad Input/Output FAST_READ (EBh). If the system goes into Full Quad I/O (EQPI),  
this QE bit becomes no affection since WP# and HOLD# function will be disabled by EQPI mode and  
Quad Input/Output FAST_READ (EBh) will be always available in EQPI mode.  
The address is latching on rising edge of CLK, and data of every four bits (interleave on 4 I/O pins) shift  
out on the falling edge of CLK at a maximum frequency FR. The first address can be any location. The  
address is automatically increased to the next higher address after each byte data is shifted out, so the  
whole memory can be read out at a single Quad Input/Output FAST_READ instruction. The address  
counter rolls over to 0 when the highest address has been reached. Once writing Quad Input/Output  
FAST_READ instruction, the following address/dummy/data out will perform as 4-bit instead of previous  
1-bit.  
The sequence of issuing Quad Input/Output FAST_READ (EBh) instruction is: CS# goes low ->  
sending Quad Input/Output FAST_READ (EBh) instruction -> 24-bit address interleave on DQ3, DQ2,  
DQ1 and DQ0 -> 6 dummy cycles -> data out interleave on DQ3, DQ2, DQ1 and DQ0 -> to end Quad  
Input/Output FAST_READ (EBh) operation can use CS# to high at any time during data out, as shown  
in Figure 15.  
The instruction sequence is shown in Figure 15.1 while using the Enable Quad Peripheral Interface mode (EQPI)  
(38h) command.  
Figure 15. Quad Input / Output Fast Read Instruction Sequence Diagram  
This Data Sheet may be revised by subsequent versions  
or modifications due to changes in technical specifications.  
©2004 Eon Silicon Solution, Inc., www.eonssi.com  
28  
Rev. E, Issue Date: 2012/01/30  
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