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EN63A0QI 参数 Datasheet PDF下载

EN63A0QI图片预览
型号: EN63A0QI
PDF下载: 下载PDF文件 查看货源
内容描述: 12A同步高度集成DC-DC PowerSoC [12A Synchronous Highly Integrated DC-DC PowerSoC]
分类和应用:
文件页数/大小: 24 页 / 1511 K
品牌: ENPIRION [ ENPIRION, INC. ]
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EN63A0QI  
Electrical Characteristics  
NOTE: VIN=6.6V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted.  
Typical values are at TA = 25°C.  
PARAMETER  
Operating Input  
Voltage  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
VIN  
2.5  
6.6  
V
Internal Voltage Reference at:  
VIN = 5V, ILOAD = 0, TA = 25°C  
VFB Pin Voltage  
VVFB  
0.594  
0.588  
-0.2  
0.600  
0.600  
0.606  
0.612  
0.2  
V
V
VFB Pin Voltage  
2.5V VIN 6.6V  
0A ILOAD 12A  
VVFB  
(Line, Load and  
Temperature)  
VFB Pin Input Leakage  
Current  
IVFB  
VFB Pin Input Leakage Current  
µA  
mA  
V
Shut-Down Supply  
Current  
Power Supply Current with  
ENABLE=0  
IS  
1.5  
2.2  
2.1  
600  
50  
Under Voltage Lock-  
out – VIN Rising  
Voltage Above Which UVLO is Not  
Asserted  
VUVLOR  
VUVLOF  
Under Voltage Lock-  
out – VIN Falling  
Voltage Below Which UVLO is  
Asserted  
V
Dropout Voltage  
VINMIN – VOUT at Full Load  
1200  
100  
12  
mV  
mΩ  
A
VDO  
RDO  
Dropout Resistance  
(Note 4)  
Input to Output Resistance  
Refer to Table 2 for conditions.  
Sourcing Current  
Continuous Output  
Current  
IOUT_SRC  
0
Over Current Trip  
Level  
IOCP  
FSW  
18.5  
1.2  
A
Switching Frequency  
0.9  
1.5  
MHz  
R
FADJ = 4.42 kΩ, VIN = 5V  
External SYNC Clock  
Frequency Lock  
Range  
SYNC Clock Input Frequency  
Range  
FPLL_LOCK  
0.9*Fsw  
Fsw  
1.1*Fsw  
MHz  
S_IN Clock Amplitude  
– Low  
VS_IN_LO  
SYNC Clock Logic Low  
SYNC Clock Logic High  
M/S Pin Float or Low  
M/S Pin High  
0
0.8  
2.5  
80  
V
V
S_IN Clock Amplitude  
– High  
VS_IN_HI  
1.8  
20  
10  
S_IN Clock Duty Cycle  
(PLL)  
DCS_INPLL  
DCS_INPWM  
%
%
S_IN Clock Duty Cycle  
(PWM)  
90  
Allowable Pre-bias as a Fraction of  
Programmed Output Voltage for  
Monotonic start up. Minimum Pre-  
bias Voltage = 300mV.  
Pre-Bias Level  
VPB  
20  
75  
%
Allowable Non-monotonicity Under  
Pre-bias Startup  
Non-Monotonicity  
VPB_NM  
100  
mV  
%
Range of Output Voltage as a  
Fraction of Programmed Value  
When POK is Asserted. (Note 3)  
VOUT Range for POK  
High  
=
90  
120  
Enpirion 2012 all rights reserved, E&OE  
Enpirion Confidential  
www.enpirion.com, Page 5  
07077  
May 9, 2012  
Rev: C  
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