EM6603
Vdd=3.0V, T=25°C (note4) (unless otherwise specified), Vreg not shorted to Vdd
Parameter
Conditions
Symb.
Min.
Typ.
Max.
Unit
(note1)
ACTIVE Supply Current
ACTIVE Supply Current
(in active mode)
+25°C (note2)
(note2) (note3)
-20°C...+85°C
+25°C
IVDDa
1.8
3.0
µA
IVDDa
IVDDh
4.5
1.0
µA
µA
STANDBY Supply Current
0.35
0.1
STANDBY Supply Current (note3)
(in Halt mode)
-20°C...+85°C
IVDDh
IVDDs
1.8
0.4
µA
µA
SLEEP Supply Current
SLEEP Supply Current
(SLEEP =1)
+25°C
(note3)
-20°C...+85°C
-20°C...+85°C
IVDDs
Vreg
1.2
1.85
µA
Regulated Voltage
1.1
V
*
Because of the voltage regulator drop at low voltages Vreg = Vdd when Vdd<1.4V
Note1: For current measurement typical quartz described in Operating Conditions is used.
All I/O pins without internal Pull Up/Down are pulled to Vdd externally.
Note2: Test loop with successive writing and reading of two different addresses with an inverted
values (five instructions should be reserved for this measurement),
Note3: NOT tested if delivered in chip form.
Note4: Test conditions for ACTIVE and STANDBY Supply current mode are: Qin = external
square wave, from rail to rail of Vreg (regulated voltage) with 100nF capacitor on Vreg.
fQin = 33kHz.
IDD Run M ode; Regulator ; VDD=3.0V
IDD Halt M ode; Regulator; VDD=3.0V
2500
750
[nA]
[nA]
2250
600
2000
450
1750
300
150 0
[°C]
[°C]
-20
0
20
40
60
80
-20
0
20
40
60
80
16.5 DC characteristics - Input/Output Pins
Vdd=1.5V / 3.0V, -20°C <T<85°C (unless otherwise specified)
Parameter
Conditions
Symb. Min.
Typ.
Max.
Unit
Input Low voltage
I/O ports A,B,C,D
TEST
Pin at hi-impedance
VIL
Vss
Vss
Vss
Vss
0.3VDD
0.3VDD
0.3VDD
0.3Vreg
V
V
V
V
Reset
Qin (Note5)
Input High voltage
I/O ports A,B,C,D
TEST
Pin at hi-impedance
VIH
0.7VDD
0.7VDD
0.7VDD
0.9Vreg
VDD
VDD
VDD
Vreg
V
V
V
V
Reset
Qin (Note5)
Output Low Current
Port B
VOL = 0.3V, VDD = 1.5V
VOL = 0.4V, VDD = 3.0V
IOL
IOL
1.5
2.0
mA
Port C,D, STRB/RST
600
800
µA
Output Low Current
Port B
10.0
1.0
13.0
1.35
1.50
mA
mA
mA
Port C, STRB/RST
Port D
1.0
03/02 REV. G/439
31
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