EM78P5840/5841/5842
8-bit Micro-controller
VII.10 PWM (Pulse Width Modulation)
(1) Overview
In PWM mode, both PWM1 and PWM2 pins produce up to a 10-bit resolution PWM output (see. Fig.10
for the functional block diagram). A PWM output has a period and a duty cycle, and it keeps the output in
high. The baud rate of the PWM is the inverse of the period. Fig.11 depicts the relationships between a
period and a duty cycle.
latch
To PWM1IF
DL2H + DL2L
DT2H
+
Fosc
DT2L
Duty Cycle
Match
1:2
1:8
1:32
1:64
Comparator
PWM1
MUX
R
S
Q
TMR1H + TMR1L
reset
IOC6
Comparator
T1P0 T1P1 T1EN
Period
Match
PRD1
Data Bus
Data Bus
latch
To PWM2IF
DL2H + DL2L
DT2H
+
DT2L
Duty Cycle
Match
T2P0 T2P1 T2EN
Comparator
PWM2
Fosc
R
S
Q
TMR2H + TMR2L
1:2
1:8
1:32
1:64
reset
MUX
IOC6
Comparator
Period
Match
PRD2
Fig.10 The Functional Block Diagram of the Dual PWMs
Period
Duty Cycle
PRD1 = TMR1
DT1 = TMR1
Fig.11 The Output Timing of the PWM
(2) Increment Timer Counter (TMRX: TMR1H/TWR1L or TMR2H/TWR2L)
TMRX are ten-bit clock counters with programmable prescalers. They are designed for the PWM module
as baud rate clock generators. TMRX can be read, written, and cleared at any reset conditions. If
employed, they can be turned down for power saving by setting T1EN bit to 0.
(3) PWM Period (PRDX : PRD1 or PRD2)
The PWM period is defined by writing to the PRDX register. When TMRX is equal to PRDX, the
following events occur on the next increment cycle:
• TMRX is cleared.
• The PWMX pin is set to 1.
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* This specification is subject to change without notice.
31
2004/11/10 V2.6
ELAN [ ELAN MICROELECTRONICS CORP ]
