EM78P5840/5841/5842
8-bit Micro-controller
VII.9_1 Code Option
EM78P5840 CODE Option Register
12 11 10
9
8
7
6
5
4
3
2
1
1
1
0
IR3 IR2 IR1 IR0 P71S P70S OSCM1 OSCM0 IRC2S
MER
/POT0
Bit 0 (/POT0): program ROM protect option.
If set 1 to the bit, program memory can be access; else if clear this bit , program memory can not be
access.
Bit 3(MER) : Memory error recover function
0 Î disable memory error recover function
1 Î enable memory error recovery function
If user enable memory error recovery function, MCU will improve effect from environment noise.
Bit 4 (IRC2S): Internal RC oscillating frequency (for system CLK) select.
0 Î 2M Hz
1 Î 4M Hz
Bit5~Bit6 (OSCM0~OSCM1): EM78P5840 oscillating mode select.
OSCM1
OSCM0
Oscillating mode
IRC mode
ERIC mode
Crystal mode
0
0
1
0
1
X
Bit 7 (P70S): PORT70 function select bit:
OSCM1
OSCM0
P70S
PORT70 status
0
0
1
1
0
1
X
X
X
X
1
General Purpose IO
OSC input, please cascade resister to AVDD
PLLC output, please cascade capacitor to AVSS
General Purpose IO, PLL function will disable
0
Bit 8 (P71S): PORT71 function select bit:
0 Î /RESET pin selected..
1 Î General purpose INPUT port “PORT71” selected
Bit 9~ Bit12 (IR0~IR3): By setting IR0~IR3, IRC mode’s oscillating frequency can be adjust. Next table
show the trimming code table of IRC frequency.
IR3~IR0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
Frequency
1.05*F
1.10*F
1.15*F
1.20*F
1.25*F
1.30*F
1.35*F
1.40*F
0.65*F
0.70*F
0.75*F
0.80*F
0.85*F
0.90*F
0.95*F
1.0*F
1111
* ”F” means the frequency of IRC output.
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* This specification is subject to change without notice.
30
2004/11/10 V2.6