EM78P458/459
OTP ROM
1. ADC Control Register (ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90)
1.1 ADCON/R9
The ADCON register controls the operation of the A/D conversion and decides which pin should
be currently active.
BIT
SYMBOL
*Init_Value
7
-
0
6
-
0
5
IOCS
0
4
3
2
ADIS2
0
1
0
ADRUN ADPD
ADIS1 ADIS0
0
0
0
0
*Init_Value: Initial value at power on reset
• ADRUN (bit 4): ADC starts to RUN.
1 = an A/D conversion is started. This bit can be set by software.
0 = reset on completion of the conversion. This bit can not be reset in software.
• ADPD (bit 3): ADC Power-down Mode.
1 = ADC is operating;
0 = switch off the resistor reference to save power even when the CPU is operating.
• ADIS2~ADIS0 (bit 2~0): Analog Input Select.
000 = AN0;
001 = AN1;
010 = AN2;
011 = AN3;
100 = AN4;
101 = AN5;
110 = AN6;
111 = AN7;
Change occurs only when the ADIF bit and the ADRUN bit are both LOW.
1.2 AD-CMP-CON/IOCA0
The AD-CMP-CON register defines the pins of Port 6 as analog inputs or as digital I/O,
individually.
BIT
SYMBOL
*Init_Value
7
VREFS
0
6
CE
0
5
COE
0
4
IMS2
0
3
IMS1
0
2
IMS0
0
1
0
CKR1 CKR0
0
0
*Init_Value: Initial value at power on reset
• VREFS (Bit 7): The input source of the Vref of the ADC.
0 = The Vref of the ADC is connected to Vdd (default value), and the P53/VREF pin carries out
the function of P53;
This specification is subject to change without prior notice.
32
06.25.2004 (V1.4)
ELAN [ ELAN MICROELECTRONICS CORP ]
