EM78P447S
OTP ROM
INSTRUCTION BINARY
0 0000 0001 rrrr
HEX
001r
MNEMONIC
IOR R
OPERATION
STATUS AFFECTED
None <Note1>
IOCR → A
R2+A → R2,
0 0000 0010 0000
0020
TBL
Z,C,DC
Bits 8~9 of R2 unchanged
0 0000 01rr rrrr
0 0000 1000 0000
0 0000 11rr rrrr
0 0001 00rr rrrr
0 0001 01rr rrrr
0 0001 10rr rrrr
0 0001 11rr rrrr
0 0010 00rr rrrr
0 0010 01rr rrrr
0 0010 10rr rrrr
0 0010 11rr rrrr
0 0011 00rr rrrr
0 0011 01rr rrrr
0 0011 10rr rrrr
0 0011 11rr rrrr
0 0100 00rr rrrr
0 0100 01rr rrrr
0 0100 10rr rrrr
0 0100 11rr rrrr
0 0101 00rr rrrr
0 0101 01rr rrrr
0 0101 10rr rrrr
0 0101 11rr rrrr
00rr
0080
00rr
01rr
01rr
01rr
01rr
02rr
02rr
02rr
02rr
03rr
03rr
03rr
03rr
04rr
04rr
04rr
04rr
05rr
05rr
05rr
05rr
MOV R,A
CLRA
CLR R
SUB A,R
SUB R,A
DECA R
DEC R
OR A,R
OR R,A
AND A,R
AND R,A
XOR A,R
XOR R,A
ADD A,R
ADD R,A
MOV A,R
MOV R,R
COMA R
COM R
None
A → R
0 → A
Z
Z
0 → R
Z,C,DC
R-A → A
Z,C,DC
R-A → R
Z
R-1 → A
Z
R-1 → R
Z
A ∨ R → A
Z
A ∨ R → R
Z
A & R → A
Z
A & R → R
Z
A ⊕ R → A
Z
A ⊕ R → R
Z,C,DC
A + R → A
Z,C,DC
A + R → R
Z
R → A
Z
Z
R → R
/R → A
Z
/R → R
INCA R
INC R
DJZA R
DJZ R
Z
R+1 → A
Z
R+1 → R
None
None
R-1 → A, skip if zero
R-1 → R, skip if zero
R(n) → A(n-1),
R(0) → C, C → A(7)
R(n) → R(n-1),
R(0) → C, C → R(7)
R(n) → A(n+1),
R(7) → C, C → A(0)
R(n) → R(n+1),
R(7) → C, C → R(0)
R(0-3) → A(4-7),
R(4-7) → A(0-3)
R(0-3) ↔ R(4-7)
R+1 → A, skip if zero
R+1 → R, skip if zero
0 → R(b)
0 0110 00rr rrrr
0 0110 01rr rrrr
0 0110 10rr rrrr
0 0110 11rr rrrr
0 0111 00rr rrrr
06rr
06rr
06rr
06rr
07rr
RRCA R
C
RRC R
C
RLCA R
RLC R
C
C
SWAPA R
None
0 0111 01rr rrrr
0 0111 10rr rrrr
0 0111 11rr rrrr
0 100b bbrr rrrr
0 101b bbrr rrrr
0 110b bbrr rrrr
0 111b bbrr rrrr
07rr
07rr
07rr
0xxx
0xxx
0xxx
0xxx
SWAP R
JZA R
JZ R
BC R,b
BS R,b
JBC R,b
JBS R,b
None
None
None
None <Note2>
None <Note3>
None
1 → R(b)
if R(b)=0, skip
if R(b)=1, skip
PC+1 → [SP],
(Page, k) → PC
(Page, k) → PC
k → A
None
1 00kk kkkk kkkk
1kkk
CALL k
None
1 01kk kkkk kkkk
1 1000 kkkk kkkk
1 1001 kkkk kkkk
1 1010 kkkk kkkk
1 1011 kkkk kkkk
1 1100 kkkk kkkk
1 1101 kkkk kkkk
1 1110 0000 0010
1kkk
18kk
19kk
1Akk
1Bkk
1Ckk
1Dkk
1E02
JMP k
MOV A,k
OR A,k
AND A,k
XOR A,k
RETL k
SUB A,k
INT
None
None
Z
Z
Z
None
Z,C,DC
None
A ∨ k → A
A & k → A
A ⊕ k → A
k → A, [Top of Stack] → PC
k-A → A
PC+1 → [SP], 002H → PC
This specification is subject to change without prior notice.
31
06.25.2003 (V1.1)
ELAN [ ELAN MICROELECTRONICS CORP ]
