EM78P447S
OTP ROM
4.4 I/O Ports
The I/O registers, Port 5, Port 6, and Port 7, are bi-directional tri-state I/O ports. The functions of Pull-high, R-option, and
Open-drain can be performed internally by CONT and IOCE respectively. There is input status change wake-up function on
Port 6, P74, and P75. Each I/O pin can be defined as "input" or "output" pin by the I/O control register (IOC5 ~ IOC7). The
I/O registers and I/O control registers are both readable and writable. The I/O interface circuits for Port 5, Port 6, and Port
7 are shown in Figures. 7(a) and (b) respectively.
PCRD
PR
Q
Q
D
CLK
CL
PCWR
IOD
PR
PORT
Q
Q
D
PDWR
PDRD
CLK
CL
0
M
U
X
1
Fig. 7 (a) The I/O Port and I/O Control Register Circuit
PCRD
VCC
ROC
PR
Q
Q
D
Weakly
Pull-up
CLK
PCWR
CL
IOD
PR
PORT
Q
Q
D
PDWR
PDRD
CLK
CL
0
M
U
X
Rex*
1
*The Rex is 430K ohm external resistor
Fig.7(b) The I/O Port with R-Option (P70, P71) Circuit
This specification is subject to change without prior notice.
17
06.25.2003 (V1.1)