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EM78P258NN 参数 Datasheet PDF下载

EM78P258NN图片预览
型号: EM78P258NN
PDF下载: 下载PDF文件 查看货源
内容描述: 8位OTP微 [8-Bit Microprocessor with OTP ROM]
分类和应用: 外围集成电路光电二极管微控制器局域网可编程只读存储器OTP只读存储器
文件页数/大小: 81 页 / 2048 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P258N  
8-Bit Microprocessor with OTP ROM  
6.2.17 IOCA1 (High Time Register)  
The 8-bit High-time register controls the inactive or High period of the pulse.  
The decimal value of its contents determines the number of oscillator cycles and  
verifies that the IR OUT pin is inactive. The inactive period of IR OUT can be calculated  
as follows:  
NOTE  
High time width = {[1+decimal high-time value (IOCA1)] * High time Scale(IOCB1) } / FT  
FT is system clock: FT=Fosc/1(CLK=2)  
FT=Fosc/2(CLK=4)  
When an interrupt is generated by the High time down counter underflow (when  
enabled), the next instruction will be fetched from address 012H (High time).  
6.2.18 IOCB1 High/Low Time Scale Control Register)  
7
6
5
4
3
2
1
0
HTSE  
HTS2  
HTS1  
HTS0  
LTSE  
LTS2  
LTS1  
LTS0  
Bit 7 (HTSE):  
High-time scale enable bit.  
0 = scale disable bit, High-time rate is 1:1  
1 = scale enable bit, High-time rate is set as Bit 6~Bit 4.  
Bit 6 ~ Bit 4 (HTS2 ~ HTS0): High-time scale bits:  
HTS2  
HTS1  
HTS0  
High-Time Rate  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1:2  
1:4  
1:8  
1:16  
1:32  
1:64  
1:128  
1:256  
Bit 3 (LTSE):  
Low-time scale enable bit.  
0 = scale disable bit, Low-time rate is 1:1  
1 = scale enable bit, Low-time rate is set as Bit 2~Bit 0.  
Bit 2 ~ Bit 0 (LTS2 ~ LTS0): Low-time scale bits:  
LTS2  
LTS1  
LTS0  
Low-Time Rate  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1:2  
1:4  
1:8  
1:16  
1:32  
1:64  
1:128  
1:256  
24 •  
Product Specification (V1.0) 06.16.2005  
(This specification is subject to change without further notice)  
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