EM78P257
OTP ROM
• Depending on the device type, R2 and hardware stack are 11-bits wide. The structure is depicted in
Fig. 4.
• Generates 2K´ 13 on-chip ROM addresses to the relative programming instruction codes. One
program page is 1K words long.
• R2 is set as all "0"s when under RESET condition.
• "JMP" instruction allows direct loading of the lower 10 program counter bits. Thus, "JMP" allows PC
go to any location within a page.
• "CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed into the stack. Thus,
the subroutine entry address can be located anywhere within a page.
• "RET" ("RETL k", "RETI") instruction loads the program counter with the contents of the top-level
stack.
• "ADD R2,A" allows the contents of ‘ A’ to be added to the current PC, and the ninth and tenth bits of
the PC are cleared.
• "MOV R2,A" allows to load an address from the "A" register to the lower 8 bits of the PC, and the ninth
and tenth bits of the PC are cleared.
• Any instruction that is written to R2 (e.g. "ADD R2,A", "MOV R2,A", "BC R2,6",×××××) will cause the
ninth and tenth bits (A8~A9) of the PC to be cleared. Thus, the computed jump is limited to the first
256 locations of a page.
• In case of EM78P257A/B, the second most significant bit(A10) will be loaded with the content of bit
PS0 in the status register (R3) upon the execution of a "JMP", "CALL", or any other instructions
which write to R2.
• All instructions are single cycle (fclk/2 or fclk/4), except for the instructions that would change the
contents of R2. This instruction will need one more instruction cycle.
This specification is subject to change without prior notice.
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07.27.2004 (V1.4)