EM78815
8-Bit Microcontroller
6 Pin Descriptions
6.1 Power Pin
Pin
I/O
Description
VDD
Power
Power
Power
Power
Digital Power
Analog Power
Digital Ground
Analog Ground
AVDD
GND
AVSS
6.2 Clock Pin
Pin
I/O
I
Description
XIN
Input pin for 32.768 kHz oscillator
Output pin for 32.768 kHz oscillator
XOUT
O
Phase lock loop capacitor, connect a 0.01µ capacitor to
0.047µ with GND.
PLLC
I
6.3 External LCD Device Control Pin
Pin
I/O
Description
External LCD driver data bus. This is pin-shared with Port
B0~Port B7.
LCDD0~LCDD7
I/O
Write enable output (active low signal). This is pin-shared
with Port C2.
Read enable output (active low signal). This is pin-shared
with Port C3.
/WR
/RD
O
O
Used as register selection. When A0 is equal to 1, the data
bus transmits LCD Data. When A0 is equal to 0, the data
bus transmits LCD Address. This is pin-shared with Port C4.
Chip Select signal output. This is pin-shared with Port C1~
Port C0
A0
O
O
/CS1 ~ /CS2
6.4 FSK, CW
Pin
I/O
Description
Should be connected to the TIP side of the twisted pair lines
for FSK.
TIP
I
Should be connected to the RING side of the twisted pair
lines for FSK.
RING
I
CWGS
CWIN
O
I
Gain adjustment of single-ended input OP Amp.
Single-ended input OP Amp for call waiting decoder.
Product Specification (V2.4) 08.01.2004
(This specification is subject to change without further notice)
7
ELAN [ ELAN MICROELECTRONICS CORP ]
