EM78815
8-Bit Microcontroller
7.2.5 R1 Page 3 UART Receiver Data Buffer
Bit 7
URR7
R
Bit 6
URR6
R
Bit 5
URR5
R
Bit 4
URR4
R
Bit 3
URR3
R
Bit 2
URR2
R
Bit 1
URR1
R
Bit 0
URR0
R
Bit 0~Bit 7(URR0~URR7) : UART receiver low 8 bit data buffer. UART receiver data
buffer is a read-only register.
7.2.6 R2 Program Counter
There are 128K × 13 External Program ROM addresses at the relative programming
instruction codes. The structure is depicted on Fig. 5.
"JMP" instruction allows a direct loading of the low 10 program counter bits.
"CALL" instruction loads the low 10 bits of the PC, PC+1, and then pushed into the
stack.
"RET'' ("RETL k", "RETI") instruction loads the program counter with the contents at
the top of stack.
"MOV R2,A" allows the loading of an address from the A register to the PC, and the
ninth and tenth bits are cleared to "0''.
"ADD R2,A" allows a relative address be added to the current PC, and contents of the
ninth and tenth bits are cleared to "0''.
"TBL" allows a relative address be added to the current PC, and contents of the ninth
and tenth bits do not change. The most significant bit (A10~A14) will be loaded with
the contents of bits PS0~PS3 in the status register (R5) upon the execution of a
"JMP'', "CALL'', "ADD R2, A'', or "MOV R2,A'' instruction.
If there is an interrupt trigger, the Program ROM will jump to Address 8 at Page 0.
The CPU will store ACC, R3 status and R5 Page automatically, it will restore after
instruction RETI.
Product Specification (V2.4) 08.01.2004
(This specification is subject to change without further notice)
13
ELAN [ ELAN MICROELECTRONICS CORP ]
