EM78468
8-BIT Microcontroller
INSTRUCTION
BINARY
STATUS
HEX
MNEMONIC
OPERATION
if R(b)=0, skip
AFFECTED
0 110b bbrr rrrr
0 111b bbrr rrrr
0xxx JBC
0xxx JBS
R, b
R, b
None
None
if R(b)=1, skip
PC+1 → [SP],
(Page, k) → PC
(Page, k) → PC
k → A
1 00kk kkkk kkkk 1kkk CALL
k
None
1 01kk kkkk kkkk 1kkk JMP
1 1000 kkkk kkkk 18kk MOV
1 1001 kkkk kkkk 19kk OR
1 1010 kkkk kkkk 1Akk AND
1 1011 kkkk kkkk 1Bkk XOR
1 1100 kkkk kkkk 1Ckk RETL
1 1101 kkkk kkkk 1Dkk SUB
1 1110 1000 00kk 1E8k PAGE
1 1110 1001 00kk 1E9K BANK
1 1111 kkkk kkkk 1Fkk ADD
k
None
None
Z
A, k
A, k
A, k
A, k
k
A ∨ k → A
Z
Z
A & k → A
A ⊕ k → A
None
Z, C, DC
None
None
Z, C, DC
k → A, [Top of Stack] → PC
k-A → A
A, k
k
k->R5(1:0)
k
k->R4(7:6)
A, k
k+A → A
<Note1> This instruction is applicable to IOC50 ~ IOCF0, IOC61 ~ IOCE1
4.13 Timing Diagram
AC Test Input/Output Waveform
2.4
2.0
0.8
2.0
0.8
TEST POINTS
0.4
AC Testing : Input is driven at 2.4V for logic "1",and 0.4V for logic "0".Timing measurements are
made at 2.0V for logic "1",and 0.8V for logic "0".
RESET Timing (CLK="0")
Instruction 1
NOP
Executed
CLK
/RESET
Tdrh
TCC Input Timing (CLKS="0")
Tins
CLK
TCC
Ttcc
Product Specification (V1.1) 04.11.2005
(This specification is subject to change without further notice)
• 55