EM78156E
8-Bit Microcontroller with MASK ROM
Address
Name
Reset Type
Bit Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
/PD7 /PD6 /PD5 /PD4
X
U
U
/PD2 /PD1 /PD0
Power-On
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0x0B
IOCB
/RESET and WDT
Wake-Up from Pin
Change
P
P
P
P
U
P
P
P
Bit Name
OD7 OD6 OD5 OD4 OD3 OD2 OD1 OD0
Power-On
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x0C
IOCC
IOCD
IOCE
IOCF
/RESET and WDT
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
/PH7 /PH6 /PH5 /PH4 /PH3 /PH2 /PH1 /PH0
Power-On
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0x0D
/RESET and WDT
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
WDTE EIS
X
U
U
ROC
X
U
U
X
U
U
X
U
U
X
U
U
Power-On
1
1
0
0
0
0
0x0E
/RESET and WDT
Wake-Up from Pin
Change
1
P
U
P
U
U
U
U
Bit Name
X
U
U
X
U
U
X
U
U
X
U
U
X
U
U
EXIE ICIE TCIE
Power-On
0
0
0
0
0
0
0x0F
/RESET and WDT
Wake-Up from Pin
Change
U
U
U
U
U
P
P
P
Bit Name
-
-
-
-
-
-
-
-
Power-On
U
P
U
P
U
P
U
P
U
P
U
P
U
P
U
P
0x10~0x2F
R10~R2F
/RESET and WDT
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
** To jump address 0x08, or to execute the instruction which is next to the “SLEP”
instruction.
X: Not used. U: Unknown or don’t care. P: Previous value before reset. t: Check
Table 6
4.5.2 The Status of RST, T, and P of STATUS Register
A RESET condition is initiated by the following events:
1. A power-on condition,
2. A high-low-high pulse on /RESET pin, and
3. Watchdog timer time-out.
The values of T and P, listed in Table 6 are used to check how the processor wakes up.
Table 7 shows the events that may affect the status of T and P.
Product Specification (V1.3) 07.29.2004
• 19
(This specification is subject to change without further notice)