EM65570
68COM/ 98SEG 65K Color STN LCD Driver
ELAN
LCD DRIVER
Low Power and
Low Voltage
Display change each 32 frame
ELAN
Line reverse start add
Line reverse end add
LCD DRIVER
Low Power and
Low Voltage
Figure 8-5b Blink Example (LREV = 1, BT = 1) Indicating Line Reverse Start/End Address
Positions
8.2.26 EEPROM Mode Select Register
D7 D6 D5 D4 D3 D2 D1 D0
M1 M0
CSB RS RDB WRB RE2 RE1 RE0
0
1
0
1
*
0
0
1
1
0
1
0
0
(At the time of reset: {M1, M0} = 3H, read address: 5H)
The (M1, M0) register controls the EEPROM operating mode as summarized below.
(M1,M0)
00
EEPROM Operating Mode
Delay Time
≧ 10 uS
≧ 4 mS
≧ 4 mS
-
VDD Voltage Required
Read
≧ 2.4V
≧ 2.8V
≧ 2.8V
-
01
Program
Erase
10
11
Reserve
8.2.27 Vop Calibration Offset Register
D7 D6 D5 D4 D3 D2 D1 D0
CV3 CV2 CV1 CV0
CSB RS RDB WRB RE2 RE1 RE0
0
1
1
0
0
1
1
0
1
0
0
(At the time of reset: {CV4, CV3, CV2, CV1} = 0H, read address: 6H)
D7 D6 D5 D4 D3 D2 D1 D0
CV5 CV4
(At the time of reset: {CV5, CV4} = 0H, read address: 7H)
CSB RS RDB WRB RE2 RE1 RE0
0
1
1
1
*
*
0
1
1
0
1
0
0
76 •
Product Specification (V1.0) 09.05.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
