EM65570
68COM/ 98SEG 65K Color STN LCD Driver
7.2 Writing Data to Display RAM and Control Register
The procedure of writing data to the display RAM and Control Register is similar except
for the RS selection which selects the accessed object.
RS = “L”: Display RAM data
RS = “H”: Control register data
In the case of the 80-family MPU, data is written at the rising edge of WRB. In the case
of the 68-family MPU, data is written at the falling edge of signal E.
7.2.1 Writing Data Operation
D7~D0
(D15~D0)
WRB
Data5
Data0
Data1
Data2
Data3
Data4
RS
Write to control register
Write to display RAM
Figure 7-4 Writing Data to Display RAM & Control Register Operation
7.3 Internal Display RAM and Register Read
7.3.1 Read Display RAM Operation
A one-time dummy read operation is required to perform the display RAM read
operation. The designated address data are not output to read operation immediately
after the address is set to AX or AY register, but are output when the second data read
is performed. Dummy read is always required once after the address is set and the
write cycle begins.
WRB
D7~D0
(D15~D0)
n
***
Dummy
Read
n
n+1
Data Read
n+2
Data Read
Address set (AX,AY)
Address = n
Data Read
Address=n
Address=n+1
Address=n+2
RDB
RS
Figure 7-5 Read Display RAM Operation
Product Specification (V1.0) 09.05.2005
• 19
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
