EDS6416AHTA-TI
Command Operation
Command Truth Table
The SDRAM recognizes the following commands specified by the /CS, /RAS, /CAS, /WE and address pins.
CKE
A0 to
A11
Function
Symbol
DESL
NOP
n – 1
H
n
×
×
×
×
×
×
×
×
×
×
×
/CS
H
L
/RAS
×
/CAS
×
/WE
×
BA1
×
BA0
×
A10
×
Device deselect
No operation
×
×
×
V
V
V
V
V
×
×
V
H
H
H
H
H
H
H
L
H
H
L
H
L
×
×
×
Burst stop
BST
H
L
×
×
×
Read
READ
READA
WRIT
WRITA
ACT
H
L
H
H
L
V
V
V
V
V
V
×
V
V
V
V
V
V
×
L
Read with auto precharge
Write
H
L
L
H
L
H
L
L
Write with auto precharge
Bank activate
H
L
L
L
H
V
L
H
L
H
H
H
L
H
L
Precharge select bank
Precharge all banks
Mode register set
PRE
H
L
L
PALL
MRS
H
L
L
L
H
L
H
L
L
L
L
L
Remark: H: VIH. L: VIL. ×: VIH or VIL. V: Valid address input.
Device deselect command [DESL]
When this command is set (/CS is High), the SDRAM ignore command input at the clock. However, the internal
status is held.
No operation [NOP]
This command is not an execution command. However, the internal operations continue.
Burst stop command [BST]
This command can stop the current burst operation.
Column address strobe and read command [READ]
This command starts a read operation. In addition, the start address of burst read is determined by the column
address (see Address Pins Table in Pin Function) and the bank select address (BA0, BA1). After the read operation,
the output buffer becomes High-Z.
Read with auto-precharge [READA]
This command automatically performs a precharge operation after a burst read with a burst length of 1, 2, 4 or 8.
Column address strobe and write command [WRIT]
This command starts a write operation. When the burst write mode is selected, the column address (see Address
Pins Table in Pin Function) and the bank select address (BA0, BA1) become the burst write start address. When the
single write mode is selected, data is only written to the location specified by the column address (see Address Pins
Table in Pin Function) and the bank select address (BA0, BA1).
Write with auto-precharge [WRITA]
This command automatically performs a precharge operation after a burst write with a length of 1, 2, 4 or 8, or after a
single write operation.
Preliminary Data Sheet E0636E10 (Ver.1.0)
12
ELPIDA [ ELPIDA MEMORY ]
