EDS5104ABTA, EDS5108ABTA, EDS5116ABTA
Power Down Mode
CLK
CKE
/CS
CKE Low
/RAS
/CAS
/WE
BS
Address
DQM
A10=1
R: a
DQ (input)
High-Z
DQ (output)
tRP
Power down cycle
Power down entry
Power down
mode exit
Precharge command
If needed
/RAS-/CAS delay = 3
/CAS latency = 3
Burst length = 4
= VIH or VIL
Active Bank 0
Initialization Sequence
53
0
1
2
3
4
5
6
7
8
9
10
48
49
50
51
52
54
55
CLK
CKE
/CS
VIH
/RAS
/CAS
/WE
code
valid
Address
Valid
V
IH
DQM
DQ
High-Z
t
t
RC
tRP
RC
l
MRD
Bank active
If needed
All banks
Precharge
Mode register
Set
Auto Refresh
Auto Refresh
Preliminary Data Sheet E0250E10 (Ver. 1.0)
48
ELPIDA [ ELPIDA MEMORY ]
