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EDS2532CABJ-75L-E 参数 Datasheet PDF下载

EDS2532CABJ-75L-E图片预览
型号: EDS2532CABJ-75L-E
PDF下载: 下载PDF文件 查看货源
内容描述: 256M位的SDRAM [256M bits SDRAM]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 48 页 / 637 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDS2532CABJ  
Burst Stop Command  
During a read cycle, when the burst stop command is issued, the burst read data are terminated and the data bus  
goes to High-Z after the /CAS latency from the burst stop command.  
CLK  
READ  
BST  
Command  
High-Z  
High-Z  
DQ  
out  
out  
out  
out  
out  
(CL = 2)  
DQ  
(CL = 3)  
out  
Burst Stop at Read  
During a write cycle, when the burst stop command is issued, the burst write data are terminated and data bus goes  
to High-Z at the same clock with the burst stop command.  
CLK  
WRITE  
in  
BST  
Command  
DQ  
High-Z  
in  
in  
in  
Burst Stop at Write  
Data Sheet E0460E40 (Ver. 4.0)  
27  
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