EDJ1108BABG, EDJ1116BABG
IDD Measurement Conditions (TC = 0°C to +85°C, VDD, VDDQ = 1.5V ± 0.075V)
Within the tables about IDD measurement conditions, the following definitions are used:
• L: VIN ≤ VIL (AC)(max.)
• H: VIN ≥ VIH (AC)(min.);
• STABLE: inputs are stable at H or L level
• FLOATING: inputs are VREF = VDDQ / 2
• SWITCHING: Described in the following Definition of SWITCHING table.
• N/A: not available
[Definition of SWITCHING]
Signals
Definitions
If not otherwise mentioned the inputs are stable at H or L during 4 clocks and change then to the
opposite value
Address (row, column)
(e.g. Ax Ax Ax Ax /Ax /Ax /Ax /Ax Ax Ax Ax Ax .....
Please see each IDDx definition for details
If not otherwise mentioned the bank addresses should be switched like the row/column
addresses - please see each IDDx definition for details
Bank address
Define D = {/CS, /RAS, /CAS, /WE } := {H, L, L, L}
Define /D = {/CS, /RAS, /CAS, /WE } := {H, H, H, H}
Command
(/CS, /RAS, /CAS, /WE)
Define Command Background Pattern = D D /D /D D D /D /D D D /D /D ...
If other commands are necessary (e.g. ACT for IDD0 or Read for IDD4R) the Background Pattern
Command is substituted by the respective /CS, /RAS, /CAS, /WE levels of the necessary command.
See each IDDx definition for details and figures of Example of IDD1, IDD2N/IDD3N, IDD4R.
Data DQ is changing between H and L every other data transfer (once per clock) for DQ signals,
which means that data DQ is stable during one clock;
see each IDDx definition for exceptions from this rule and for further details.
See figures of Example of IDD1, IDD2N/IDD3N, IDD4R.
Data (DQ)
Data Masking (DM)
NO Switching; DM must be driven L all the time
AC Timing for IDD Test Conditions
For purposes of IDD testing, the following parameters are to be utilized.
DDR3-1600
DDR3-1333
DDR3-1066
DDR3-800
5-5-5
5
Parameter
10-10-10 11-11-11 8-8-8
9-9-9
9
6-6-6
6
7-7-7
8-8-8
8
6-6-6
6
Unit
tCK
ns
CL (IDD)
10
11
8
7
tCK min.(IDD)
tRCD min. (IDD)
tRC min. (IDD)
tRAS min.(IDD)
tRP min. (IDD)
tFAW (IDD)-×8
tFAW (IDD)-×16
tRRD (IDD)-×8
tRRD (IDD)-×16
tRFC (IDD)
1.25
12.5
47.5
35
1.25
13.75
48.75
35
1.5
12
48
36
12
30
45
6.0
7.5
110
1.5
13.5
49.5
36
1.875
11.25
48.75
37.5
11.25
37.5
50
1.875
13.13
50.63
37.5
13.13
37.5
50
1.875
15
2.5
2.5
15
12.5
50
ns
52.50
37.5
15
52.5
37.5
15
ns
37.5
12.5
40
ns
12.5
30
13.75
30
13.5
30
ns
37.5
50
40
ns
45
50
50
ns
6.0
6.0
6.0
7.5
110
7.5
7.5
7.5
10
10
ns
10
10
10
10
10
ns
110
110
110
110
110
110
110
ns
Data Sheet E1248E40 (Ver. 4.0)
32
ELPIDA [ ELPIDA MEMORY ]
