EDJ1108BABG, EDJ1116BABG
[Differential Output Slew Rate Definition]
Measured
Description
From
To
Defined by
VOHdiff(AC) – VOLdiff (AC)
∆TRdiff
Differential output slew rate for
rising edge
VOLdiff (AC)
VOHdiff (AC)
VOHdiff (AC) – VOLdiff (AC)
Differential output slew rate for
falling edge
VOHdiff (AC)
VOLdiff (AC)
∆TFdiff
VOHdiff (AC)
0
VOLdiff (AC)
∆TRdiff
∆TFdiff
VOHdiff (AC)
−
VOLdiff (AC)
VOHdiff (AC)
−
VOLdiff (AC)
Falling slew =
Rising slew =
∆TFdiff
∆TRdiff
Differential Input Slew Rate Definition for DQS, /DQS and CK, /CK
Output Slew Rate (RON = RZQ/7 setting)
Parameter
Symbol
SRQse
Speed
min.
2.5
max.
5
Unit
Notes
1
DDR3-800
DDR3-1066
DDR3-1333
DDR3-1600
Output slew rate
(Single-ended)
V/ns
DDR3-800
DDR3-1066
DDR3-1333
DDR3-1600
Output slew rate
(Differential)
SRQdiff
5
12
V/ns
1
Remark: SR = slew rate. se = single-ended signals. diff = differential signals. Q = Query output
Note: 1.In two cases, a maximum slew rate of 6V/ns applies for a single DQ signal within a byte lane.
(a) is defined for a single DQ signal within a byte lane which is switching into a certain direction (either from
high to low or low to high) while all remaining DQ signals in the same byte lane are static (i.e. they stay at
either high or low).
(b) is defined for a single DQ signal within a byte lane which is switching into a certain direction (either from
high to low or low to high) while all remaining DQ signals in the same byte lane are switching into the
opposite direction (i.e. from low to high or high to low respectively). For the remaining DQ signal switching
into the opposite direction, the regular maximum limit of 5V/ns applies.
Reference Load for AC Timing and Output Slew Rate
VDDQ
DUT
DQ
DQS,
/DQS
CK, /CK
VTT = VSSQ/2
RT =25Ω
Reference Output Load
Data Sheet E1248E40 (Ver. 4.0)
22
ELPIDA [ ELPIDA MEMORY ]
