EDE1108AFBG
ODT (On Die Termination)
On Die Termination (ODT), is a feature that allows a DRAM to turn on/off termination resistance for each DQ, DQS,
/DQS, RDQS, /RDQS, and DM signal via the ODT control pin. The ODT feature is designed to improve signal
integrity of the memory channel by allowing the DRAM controller to independently turn on/off termination resistance
for any or all DRAM devices.
The ODT function is turned off and not supported in self-refresh mode.
VDDQ
VDDQ
VDDQ
sw1
sw2
sw3
Rval1
Rval2
Rval3
DRAM
input
buffer
Input
Pin
Rval1
Rval2
Rval3
sw1
sw2
sw3
VSSQ
VSSQ
VSSQ
Switch sw1, sw2 or sw3 is enabled by ODT pin.
Selection between sw1, sw2 or sw3 is determined by Rtt (nominal) in EMRS
Termination included on all DQs, DM, DQS, /DQS, RDQS and /RDQS pins.
Target Rtt (Ω) = (Rval1) / 2, (Rval2) / 2 or (Rval3) / 2
Functional Representation of ODT
/CK
CK
Command
ODT
EMRS
NOP
tAOFD
tIS
tMOD (max.)
tMOD (min.)
Rtt
Old setting
Updating
New Setting
Note: tAOFD must be met before issuing EMRS command. ODT must remain low for the entire duration of tMOD window.
ODT update Delay Timing
Preliminary Data Sheet E1430E20 (Ver. 2.0)
45
ELPIDA [ ELPIDA MEMORY ]
