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EDD2516AKTA-6B-E 参数 Datasheet PDF下载

EDD2516AKTA-6B-E图片预览
型号: EDD2516AKTA-6B-E
PDF下载: 下载PDF文件 查看货源
内容描述: 256M比特DDR SDRAM ( 16M字×16位) [256M bits DDR SDRAM (16M words x 16 bits)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 49 页 / 546 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDD2516AKTA-E  
DC Characteristics 1 (TA = 0 to +70°C, VDD, VDDQ = 2.5V ± 0.2V, VSS, VSSQ = 0V)  
max.  
Parameter  
Symbol  
Grade  
× 16  
Unit  
mA  
Test condition  
Notes  
1, 2, 9  
110  
100  
-6B  
-7A, -7B  
CKE VIH,  
tRC = tRC (min.)  
Operating current (ACT-PRE) IDD0  
CKE VIH, BL = 4,  
140  
130  
Operating current  
IDD1  
-6B  
-7A, -7B  
mA  
CL = 2.5,  
1, 2, 5  
(ACT-READ-PRE)  
tRC = tRC (min.)  
Idle power down standby  
IDD2P  
current  
3
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
CKE VIL  
4
35  
30  
30  
25  
-6B  
CKE VIH, /CS VIH  
DQ, DQS, DM = VREF  
CKE VIH, /CS VIH  
DQ, DQS, DM = VREF  
Floating idle standby current  
IDD2F  
IDD2Q  
IDD3P  
IDD3N  
IDD4R  
IDD4W  
IDD5  
4, 5  
-7A, -7B  
-6B  
-7A, -7B  
Quiet idle standby current  
4, 10  
3
Active power down standby  
current  
20  
CKE VIL  
55  
50  
-6B  
-7A, -7B  
-6B  
-7A, -7B  
-6B  
-7A, -7B  
-6B  
-7A, -7B  
CKE VIH, /CS VIH  
tRAS = tRAS (max.)  
CKE VIH, BL = 2,  
CL = 2.5  
CKE VIH, BL = 2,  
CL = 2.5  
tRFC = tRFC (min.),  
Input VIL or VIH  
Active standby current  
3, 5, 6  
1, 2, 5, 6  
1, 2, 5, 6  
205  
180  
205  
180  
200  
175  
Operating current  
(Burst read operation)  
Operating current  
(Burst write operation)  
Auto Refresh current  
Self refresh current  
Input VDD – 0.2 V  
Input 0.2 V  
IDD6  
3
350  
300  
Operating current  
(4 banks interleaving)  
-6B  
-7A, -7B  
IDD7A  
BL = 4  
5, 6, 7  
Notes: 1. These IDD data are measured under condition that DQ pins are not connected.  
2. One bank operation.  
3. One bank active.  
4. All banks idle.  
5. Command/Address transition once per one clock cycle.  
6. DQ, DM and DQS transition twice per one clock cycle.  
7. 4 banks active. Only one bank is running at tRC = tRC (min.)  
8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general.  
9. Command/Address transition once every two clock cycle.  
10. Command/Address stable at VIH or VIL.  
DC Characteristics 2 (TA = 0 to +70°C, VDD, VDDQ = 2.5V ± 0.2V, VSS, VSSQ = 0V)  
Parameter  
Symbol  
ILI  
min.  
–2  
max.  
2
Unit  
µA  
Test condition  
Notes  
Input leakage current  
Output leakage current  
Output high current  
Output low current  
VDD VIN VSS  
VDDQ VOUT VSS  
VOUT = 1.95V  
ILO  
–5  
5
µA  
IOH  
IOL  
–15.2  
15.2  
mA  
mA  
VOUT = 0.35V  
Data Sheet E0502E30 (Ver. 3.0)  
5