Interleaved Column Read Cycle (1/2) (Burst Length = 8, /CAS Latency = 2)
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
CLK
/CLK
CKE
/CS
H
/RAS
/CAS
/WE
BA0
BA1
A10
RAa
RAa
RDa
RDa
ADD
CAa
CDa
CDb
CDc
CAb
CDd
DQM
Hi-Z
Hi-Z
V
TT
TT
DQS
DQ
Dd1 Dd2 Dd3 Dd4 Dd5 Dd6 Dd7 Dd8
Aa1 Aa2 Aa3 Aa4 Aa5 Aa6 Aa7 Aa8 Da1 Da2 Da3 Da4 Db1 Db2 Db3 Db4 Dc1 Dc2 Dc3 Dc4 Ab1 Ab2 Ab3 Ab4
V
Activate
Command
for Bank A
Read
Command
for Bank A
Read
Command
for Bank D
Read
Command
for Bank D
Read
Command
for Bank D
Read
Command
for Bank A
Read
Command
for Bank D
Activate
Command
for bank D
Precharge
Command
for Bank A
Precharge
Command
for Bank D