EBJ11UE6BASA
Hex
Byte No. Function described
SDRAM minimum /RAS to /CAS delay
(tRCD)
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 value Comments
18
0
1
1
0
0
0
0
0
60H
12ns
-DG
-DJ
0
0
0
0
0
0
1
1
1
1
1
1
1
0
1
1
1
1
0
1
0
1
0
1
1
1
1
1
0
1
1
0
0
0
1
0
0
1
0
0
0
0
0
0
1
0
0
0
6CH 13.5ns
5AH 11.25ns
-AC
-AE
-AG
-8A
-8C
69H
78H
64H
78H
13.125ns
15ns
12.5ns
15ns
SDRAM minimum row active to row active
19
20
delay (tRRD)
-DG, -DJ
0
0
0
0
1
1
1
0
1
1
1
0
1
0
0
1
0
0
0
0
0
0
0
0
3CH 7.5ns
-AC, -AE, -AG, -8A, -8C
50H
60H
10ns
12ns
SDRAM minimum row precharge time
(tRP)
-DG
-DJ
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
0
1
1
1
1
0
0
1
0
1
0
1
1
1
1
1
1
0
1
0
1
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
1
6CH 13.5ns
5AH 11.25ns
-AC
-AE
69H
78H
64H
78H
11H
13.125ns
15ns
-AG
-8A
12.5ns
15ns
-8C
21
22
SDRAM upper nibbles for tRAS and tRC
SDRAM minimum active to precharge time
(tRAS), LSB
-DG, -DJ
0
0
1
0
0
0
1
1
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
20H
36ns
-AC, -AE, -AG, -8A, -8C
2CH 37.5ns
80H 48ns
8CH 49.5ns
SDRAM minimum active to active /auto-
refresh time (tRC), LSB
-DG
23
-DJ
-AC
-AE
-AG
-8A
-8C
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
0
1
0
0
1
0
1
0
1
0
0
0
0
0
1
1
1
1
0
1
0
1
0
0
0
0
0
0
1
0
0
0
86H
95H
48.75ns
50.625ns
A4H 52.5ns
90H 50ns
A4H 52.5ns
SDRAM minimum refresh recovery time
delay (tRFC), LSB
24
25
26
0
0
0
1
0
0
1
1
0
1
0
0
1
0
0
1
0
1
0
0
1
0
70H
03H
110ns
110ns
SDRAM minimum refresh recovery time
delay (tRFC), MSB
0
SDRAM minimum internal write to read
command delay (tWTR)
1
1
3CH 7.5ns
SDRAM minimum internal read to
precharge command delay (tRTP)
27
28
0
0
0
0
1
0
1
0
1
0
0
0
0
1
3CH 7.5ns
01H
Upper nibble for tFAW
0
Minimum four activate window delay time
29
(tFAW)
-DG, -DJ
0
1
1
0
1
0
0
1
1
0
0
0
0
0
0
0
68H
90H
45ns
50ns
-AC, -AE, -AG, -8A, -8C
Preliminary Data Sheet E1224E10 (Ver. 1.0)
7
ELPIDA [ ELPIDA MEMORY ]
