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EBE41AE4ACFA-6E-E 参数 Datasheet PDF下载

EBE41AE4ACFA-6E-E图片预览
型号: EBE41AE4ACFA-6E-E
PDF下载: 下载PDF文件 查看货源
内容描述: 注册4GB DDR2 SDRAM DIMM [4GB Registered DDR2 SDRAM DIMM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 27 页 / 234 K
品牌: ELPIDA [ ELPIDA MEMORY ]
 浏览型号EBE41AE4ACFA-6E-E的Datasheet PDF文件第1页浏览型号EBE41AE4ACFA-6E-E的Datasheet PDF文件第2页浏览型号EBE41AE4ACFA-6E-E的Datasheet PDF文件第3页浏览型号EBE41AE4ACFA-6E-E的Datasheet PDF文件第4页浏览型号EBE41AE4ACFA-6E-E的Datasheet PDF文件第6页浏览型号EBE41AE4ACFA-6E-E的Datasheet PDF文件第7页浏览型号EBE41AE4ACFA-6E-E的Datasheet PDF文件第8页浏览型号EBE41AE4ACFA-6E-E的Datasheet PDF文件第9页  
EBE41AE4ACFA  
Serial PD Matrix  
Byte No. Function described  
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value Comments  
Number of bytes utilized by module  
manufacturer  
0
1
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
80H  
08H  
128 bytes  
256 bytes  
Total number of bytes in serial PD  
device  
2
3
4
5
6
7
8
Memory type  
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
1
0
0
0
1
0
0
0
0
1
0
1
1
0
0
0
0
0
0
1
1
0
0
1
08H  
0EH  
0BH  
61H  
48H  
00H  
05H  
DDR2 SDRAM  
Number of row address  
Number of column address  
Number of DIMM ranks  
Module data width  
14  
11  
2
72  
Module data width continuation  
Voltage interface level of this assembly  
0
SSTL 1.8V  
DDR SDRAM cycle time, CL = 5  
-8E  
9
0
0
0
0
0
0
0
1
1
0
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
0
0
1
1
0
0
1
0
25H  
30H  
40H  
45H  
06H  
2.5ns*1  
3.0ns*1  
0.4ns*1  
0.45ns*1  
-6E  
SDRAM access from clock (tAC)  
-8E  
10  
-6E  
ECC, Address/  
command Parity  
11  
DIMM configuration type  
12  
13  
14  
15  
Refresh rate/type  
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
0
0
0
0
82H  
04H  
04H  
00H  
7.8µs  
× 4  
× 4  
0
Primary SDRAM width  
Error checking SDRAM width  
Reserved  
SDRAM device attributes:  
Burst length supported  
16  
17  
18  
0
0
0
0
0
0
0
0
1
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0CH  
08H  
38H  
4,8  
SDRAM device attributes: Number of  
banks on SDRAM device  
8
SDRAM device attributes:  
/CAS latency  
3, 4, 5  
19  
20  
21  
DIMM Mechanical Characteristics  
DIMM type information  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
01H  
01H  
00H  
4.00mm max.  
Registered  
Normal  
SDRAM module attributes  
Weak Driver  
50ODT Support  
22  
23  
24  
25  
26  
SDRAM device attributes: General  
0
0
0
0
0
0
0
1
1
1
0
1
0
0
1
0
1
1
1
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
0
1
1
0
0
0
03H  
3DH  
50H  
50H  
60H  
Minimum clock cycle time at CL = 4  
3.75ns*1  
0.5ns*1  
5.0ns*1  
0.6ns*1  
Maximum data access time (tAC) from  
clock at CL = 4  
Minimum clock cycle time at CL = 3  
Maximum data access time (tAC) from  
clock at CL = 3  
Minimum row precharge time (tRP)  
-8E  
27  
0
0
0
0
0
0
1
1
0
1
1
1
0
1
1
0
1
1
1
0
1
0
0
0
32H  
3CH  
1EH  
12.5ns  
15ns  
-6E  
Minimum row active to row active delay  
(tRRD)  
28  
29  
7.5ns  
Minimum /RAS to /CAS delay (tRCD)  
-8E  
0
0
0
0
0
0
1
1
1
1
1
0
0
1
1
0
1
1
1
0
0
0
0
1
32H  
3CH  
2DH  
12.5ns  
15ns  
-6E  
Minimum active to precharge time  
(tRAS)  
30  
45ns  
Data Sheet E1078E40 (Ver. 4.0)  
5