EBE41RE4AAHA
Parameter
Symbol Grade
max
Unit
mA
Test condition
tCK = tCK (IDD);
-5C
9670
Refresh command at every tRFC (IDD) interval;
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Auto-refresh current
IDD5
-4A
8590
842
Self Refresh Mode;
CK and /CK at 0V;
CKE ≤ 0.2V;
Other control and address bus inputs are FLOATING;
Data bus inputs are FLOATING
-5C
IDD6
Self-refresh current
mA
mA
-4A
590
all bank interleaving reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = tRCD (IDD) −1 × tCK (IDD);
tCK = tCK (IDD), tRC = tRC (IDD), tRRD = tRRD(IDD),
tRCD = 1 × tCK (IDD);
CKE is H, CS is H between valid commands;
Address bus inputs are STABLE during DESELECTs;
Data pattern is same as IDD4W;
-5C
IDD7
9190
8650
Operating current
(Bank interleaving)
-4A
Notes: 1. IDD specifications are tested after the device is properly initialized.
2. Input slew rate is specified by AC Input Test Condition.
3. IDD parameters are specified with ODT disabled.
4. Data bus consists of DQ, DM, DQS, /DQS, RDQS, /RDQS, LDQS, /LDQS, UDQS, and /UDQS. IDD
values must be met with all combinations of EMRS bits 10 and 11.
5. Definitions for IDD
L is defined as VIN ≤ VIL (AC) (max.)
H is defined as VIN ≥ VIH (AC) (min.)
STABLE is defined as inputs stable at an H or L level
FLOATING is defined as inputs at VREF = VDDQ/2
SWITCHING is defined as:
inputs changing between H and L every other clock cycle (once per two clocks) for address and control
signals, and inputs changing between H and L every other data transfer (once per clock) for DQ signals
not including masks or strobes.
6. Refer to AC Timing for IDD Test Conditions.
AC Timing for IDD Test Conditions
For purposes of IDD testing, the following parameters are to be utilized.
DDR2-533
DDR2-400
Parameter
CL(IDD)
4-4-4
4
3-3-3
3
Unit
tCK
ns
tRCD(IDD)
tRC(IDD)
15
15
60
55
ns
tRRD(IDD)
tCK(IDD)
7.5
7.5
5
ns
3.75
45
ns
tRAS(min.)(IDD)
tRAS(max.)(IDD)
tRP(IDD)
40
ns
70000
15
70000
15
ns
ns
tRFC(IDD)
127.5
127.5
ns
Data Sheet E0629E20 (Ver. 2.0)
12
ELPIDA [ ELPIDA MEMORY ]
