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EBE41RE4AAHA-5C-E 参数 Datasheet PDF下载

EBE41RE4AAHA-5C-E图片预览
型号: EBE41RE4AAHA-5C-E
PDF下载: 下载PDF文件 查看货源
内容描述: 注册4GB DDR2 SDRAM DIMM ( 512M字× 72位, 2级) [4GB Registered DDR2 SDRAM DIMM (512M words x 72 bits, 2 Ranks)]
分类和应用: 存储内存集成电路动态存储器双倍数据速率时钟
文件页数/大小: 22 页 / 196 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EBE41RE4AAHA  
DC Characteristics 1 (TC = 0°C to +85°C, VDD = 1.8V ± 0.1V, VSS = 0V)  
Parameter  
Symbol Grade  
max  
Unit  
Test condition  
one bank; tCK = tCK (IDD), tRC = tRC (IDD),  
tRAS = tRAS min.(IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data bus inputs are SWITCHING  
-5C  
4640  
Operating current  
(ACT-PRE)  
IDD0  
mA  
-4A  
3830  
4950  
one bank; IOUT = 0mA;  
BL = 4, CL = CL(IDD), AL = 0;  
-5C  
IDD1  
tCK = tCK (IDD), tRC = tRC (IDD),  
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data pattern is same as IDD4W  
Operating current  
(ACT-READ-PRE)  
mA  
-4A  
4050  
all banks idle;  
tCK = tCK (IDD);  
CKE is L;  
Other control and address bus inputs are STABLE;  
Data bus inputs are FLOATING  
-5C  
IDD2P  
1092  
912  
Precharge power-down  
standby current  
mA  
mA  
-4A  
all banks idle;  
tCK = tCK (IDD);  
CKE is H, /CS is H;  
Other control and address bus inputs are STABLE;  
Data bus inputs are FLOATING  
-5C  
IDD2Q  
2100  
1740  
Precharge quiet standby  
current  
-4A  
all banks idle;  
-5C  
IDD2N  
2460  
2100  
tCK = tCK (IDD);  
CKE is H, /CS is H;  
Other control and address bus inputs are  
SWITCHING;  
Idle standby current  
mA  
-4A  
Data bus inputs are SWITCHING  
all banks open;  
tCK = tCK (IDD);  
CKE is L;  
Other control and  
address bus inputs are  
STABLE;  
Data bus inputs are  
FLOATING  
-5C  
2460  
2100  
Fast PDN Exit  
MRS(12) = 0  
IDD3P-F  
-4A  
mA  
mA  
Active power-down  
standby current  
-5C  
1560  
1200  
Slow PDN Exit  
MRS(12) = 1  
IDD3P-S  
-4A  
all banks open;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD),  
tRP = tRP (IDD);  
CKE is H, /CS is H between valid commands;  
Other control and address bus inputs are  
SWITCHING;  
-5C  
IDD3N  
4460  
3740  
6840  
5580  
6840  
5580  
Active standby current  
mA  
mA  
mA  
-4A  
Data bus inputs are SWITCHING  
all banks open, continuous burst reads, IOUT = 0mA;  
BL = 4, CL = CL(IDD), AL = 0;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD),  
tRP = tRP (IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data pattern is same as IDD4W  
-5C  
IDD4R  
Operating current  
(Burst read operating)  
-4A  
all banks open, continuous burst writes;  
BL = 4, CL = CL(IDD), AL = 0;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD),  
tRP = tRP (IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data bus inputs are SWITCHING  
-5C  
IDD4W  
Operating current  
(Burst write operating)  
-4A  
Data Sheet E0629E20 (Ver. 2.0)  
11  
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