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EBE11UD8AJUA-8E-E 参数 Datasheet PDF下载

EBE11UD8AJUA-8E-E图片预览
型号: EBE11UD8AJUA-8E-E
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM Module, 128MX64, 0.4ns, CMOS, ROHS COMPLIANT, SODIMM-200]
分类和应用: 时钟动态存储器双倍数据速率内存集成电路
文件页数/大小: 28 页 / 259 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EBE11UD8AJUA  
DC Characteristics 1 (TC = 0°C to +85°C, VDD = 1.8V ± 0.1V)  
Parameter  
Symbol Grade  
max.  
Unit  
Test condition  
Operating current  
(ACT-PRE)  
(Another rank is in IDD2P)  
-8E, -8G  
-6E  
520  
480  
one bank; tCK = tCK (IDD), tRC = tRC (IDD),  
tRAS = tRAS min.(IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data bus inputs are SWITCHING  
IDD0  
IDD0  
mA  
Operating current  
(ACT-PRE)  
(Another rank is in IDD3N)  
-8E, -8G  
-6E  
760  
680  
mA  
mA  
one bank; IOUT = 0mA;  
BL = 4, CL = CL(IDD), AL = 0;  
Operating current  
-8E, -8G  
-6E  
600  
560  
IDD1  
IDD1  
(ACT-READ-PRE)  
(Another rank is in IDD2P)  
tCK = tCK (IDD), tRC = tRC (IDD),  
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data pattern is same as IDD4W  
Operating current  
-8E, -8G  
-6E  
840  
760  
mA  
mA  
(ACT-READ-PRE)  
(Another rank is in IDD3N)  
all banks idle;  
tCK = tCK (IDD);  
CKE is L;  
Other control and address bus inputs are STABLE;  
Data bus inputs are FLOATING  
Precharge power-down  
standby current  
IDD2P  
IDD2Q  
160  
240  
all banks idle;  
tCK = tCK (IDD);  
CKE is H, /CS is H;  
Other control and address bus inputs are STABLE;  
Data bus inputs are FLOATING  
Precharge quiet standby  
current  
mA  
mA  
all banks idle;  
tCK = tCK (IDD);  
CKE is H, /CS is H;  
Other control and address bus inputs are  
SWITCHING;  
Idle standby current  
IDD2N  
320  
Data bus inputs are SWITCHING  
all banks open;  
tCK = tCK (IDD);  
CKE is L;  
Other control and  
address bus inputs  
are STABLE;  
Fast PDN Exit  
MRS(12) = 0  
IDD3P-F  
IDD3P-S  
240  
192  
mA  
mA  
Active power-down  
standby current  
Slow PDN Exit  
MRS(12) = 1  
Data bus inputs are  
FLOATING  
all banks open;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD),  
tRP = tRP (IDD);  
CKE is H, /CS is H between valid commands;  
Other control and address bus inputs are  
SWITCHING;  
-8E, -8G  
-6E  
640  
560  
Active standby current  
IDD3N  
mA  
Data bus inputs are SWITCHING  
all banks open, continuous burst reads, IOUT =  
0mA;  
BL = 4, CL = CL(IDD), AL = 0;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP =  
tRP (IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data pattern is same as IDD4W  
Operating current  
-8E, -8G  
-6E  
1080  
960  
IDD4R  
IDD4R  
mA  
mA  
(Burst read operating)  
(Another rank is in IDD2P)  
Operating current  
-8E, -8G  
-6E  
1320  
1160  
(Burst read operating)  
(Another rank is in IDD3N)  
all banks open, continuous burst writes;  
BL = 4, CL = CL(IDD), AL = 0;  
tCK = tCK (IDD), tRAS = tRAS max.(IDD),  
tRP = tRP (IDD);  
CKE is H, /CS is H between valid commands;  
Address bus inputs are SWITCHING;  
Data bus inputs are SWITCHING  
Operating current  
-8E, -8G  
-6E  
1040  
920  
IDD4W  
IDD4W  
mA  
mA  
(Burst write operating)  
(Another rank is in IDD2P)  
Operating current  
-8E, -8G  
-6E  
1280  
1120  
(Burst write operating)  
(Another rank is in IDD3N)  
Data Sheet E1083E20 (Ver. 2.0)  
11  
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