GD25Q32CxIGx 3.3V Uniform Sector Dual and Quad Serial Flash
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8. ELECTRICAL CHARACTERISTICS
8.1. Power-On Timing
Figure 40. Power-on Timing Sequence Diagram
Table6. Power-Up Timing and Write Inhibit Threshold
Parameter Min
Symbol
Max
Unit
tVSL
tPUW
VWI
VCC(min) To CS# Low
10
1
us
ms
V
Time Delay From VCC(min) To Write Instruction
Write Inhibit Voltage VCC(min)
10
1
2.5
8.2. Initial Delivery State
The device is delivered with the memory array erased: all bits are set to 1(each byte contains FFH).The Status
Register bits are set to 0, except DRV0 bit (S21) is set to 1.
8.3. Data Retention And Endurance
Parameter
Test Condition
Min
Unit
150°C
125°C
10
20
Years
Years
Minimum Pattern Data Retention Time
Erase/Program Endurance
-40 to 85°C
100K
Cycles
Rev.1.0
50 - 43