ELM327
Pin Descriptions
MCLR (pin 1)
return and a linefeed character. If it is at a low level,
lines will be terminated by a carriage return only.
This behaviour can always be modified by issuing an
AT L1 or AT L0 command.
A momentary (>2µsec) logic low applied to this input
will reset the ELM327. If unused, this pin should be
connected to a logic high (VDD) level.
Vmeasure (pin 2)
VSS (pin 8)
This analog input is used to measure a 0 to 5V
signal that is applied to it. Care must be taken to
prevent the voltage from going outside of the supply
levels of the ELM327, or damage may occur. If it is
not used, this pin should be tied to either VDD or VSS.
Circuit common must be connected to this pin.
XT1 (pin 9) and XT2 (pin 10)
A 4.000 MHz oscillator crystal is connected between
these two pins. Loading capacitors as required by
the crystal (typically 27pF each) will also need to be
connected between each of these pins and circuit
common (Vss).
J1850 Volts (pin 3)
This output can be used to control a voltage supply
for the J1850 Bus+ output. The pin normally outputs
a logic high level when a nominal 8V is required (for
J1850 VPW), and a low level for 5V (for J1850
PWM), but this can be changed with PP 12. If this
switching capability is not required for your
application, this output can be left open-circuited.
Note that this device has not been configured for
operation with an external oscillator – it expects a
crystal to be connected to these pins. Use of an
external clock source is not recommended. Also,
note that this oscillator is turned off when in the Low
Power or ‘standby’ mode of operation.
J1850 Bus+ (pin 4)
VPW In (pin 11)
This active high output is used to drive the
J1850 Bus+ Line to an active level. Note that this
signal does not have to be used for the Bus- Line (as
was the case for the ELM320), since a separate
J1850 Bus- drive output is provided on pin 14.
This is the active high input for the J1850 VPW data
signal. When at rest (bus recessive) this pin should
be at a low logic level. This input has Schmitt trigger
wave shaping, so no special amplification is
required.
Memory (pin 5)
ISO In (pin 12)
This input controls the default state of the memory
option. If this pin is at a high level during power-up or
reset, the memory function will be enabled by
default. If it is at a low level, then the default will be
to have it disabled. Memory can always be enabled
or disabled with the AT M1 and AT M0 commands.
This is the active low input for the ISO 9141 and
ISO 14230 data signal. It is derived from the K Line,
and should be at a high logic level when at rest (bus
recessive). No special amplification is required, as
this input has Schmitt trigger wave shaping.
Baud Rate (pin 6)
PWM In (pin 13)
This input controls the baud rate of the RS232
interface. If it is at a high level during power-up or
reset, the baud rate will be set to 38400 (or the rate
that has been set by PP 0C). If at a low level, the
baud rate will be initialized to 9600 bps.
This is the active low input for the J1850 PWM data
signal. It should normally be at a high level when at
rest (ie. bus recessive). This input has Schmitt
trigger wave shaping, so no special amplification is
required.
LFmode (pin 7)
J1850 Bus- (pin 14)
This input is used to select the default linefeed mode
to be used after a power-up or system reset. If it is at
a high level, then by default messages sent by the
ELM327 will be terminated with both a carriage
This active high output is used to drive the J1850
Bus- Line to an active (dominant) level for J1850
PWM applications. If unused, this output can be left
open-circuited.
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ELM327DSI
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