GD25LQ40xIGx 1.8V Uniform Sector Dual and Quad Serial Flash
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7.2. Write Disable (WRDI) (04H)
The Write Disable command is for resetting the Write Enable Latch (WEL) bit. The Write Disable command
sequence: CS# goes low → Sending the Write Disable command → CS# goes high. The WEL bit is reset by
following condition: Power-up and upon completion of the Write Status Register, Page Program, Sector Erase,
Block Erase, Chip Erase, Erase/Program Security Registers and Reset commands.
Figure 3. Write Disable Sequence Diagram
CS#
0
1
2
3
4
5
6
7
SCLK
SI
Command
04H
High-Z
SO
Figure 3a. Write Disable Sequence Diagram (QPI)
CS#
0
1
SCLK
Command
04H
IO0
IO1
IO2
IO3
Rev.1.0
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