DMP2075UFDB
90
80
70
60
50
40
30
20
10
0
0.8
0.6
0.4
0.2
0
)
V
V
= -2.5V
(
GS
E
G
I
= -2.5A
D
A
T
L
O
V
D
I
= -1mA
D
L
V
= -4.5V
GS
O
H
S
I
= -2.9A
D
E
R
I
= -250µA
D
H
T
E
T
A
G
,
)
h
t
(
S
G
V
-50 -25
0
25
50
75 100 125 150
-50 -25
0
25
50
75 100 125 150
TJ, JUNCTION TEMPERATURE ( C)
TJ, JUNCTION TEMPERATURE (C)
Figure 8 Gate Threshold Variation vs. Junction Temperature
Figure 7 On-Resistance Variation with Temperature
20
15
10
5
10000
f=1MHz
1000
C
iss
T
= 150°C
J
T
= 25°C
J
T
= 125°C
= 85°C
J
T
= -55°C
J
C
T
oss
J
100
C
rss
0
10
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
0
5
10
15
20
VSD, SOURCE-DRAIN VOLTAGE (V)
Figure 9 Diode Forward Voltage vs. Current
VDS , DRAIN-SOURCE VOLTAGE (V)
Figure 10 Typical Junction Capacitance
8
6
4
2
0
100
R
DS(ON)
Limited
P = 10µs
W
V
I
= -10V
DS
10
1
)
A
= -4A
D
(
T
N
E
R
R
U
C
DC
P
= 10s
P
N
W
I
A
= 1s
W
R
D
P
= 100ms
W
,
ID
TJ(MAX) = 150°C
TC = 25°C
0.1
P
= 10ms
P
W
VGS =- 4.5V
Single Pulse
DUT on 1 * MRP Board
= 1ms
W
0.01
0
2
4
6
8
10
12
14
16
0.1
1
10
100
Qg, TOTAL GATE CHARGE (nC)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 12 SOA, Safe Operation Area
Figure 11 Gate Charge
4 of 7
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October 2017
© Diodes Incorporated
DMP2075UFDB
Document number: DS40150 Rev. 2 - 2