74LVCE1G126
SINGLE BUFFER GATE WITH 3-STATE OUTPUT
Parameter Measurement Information
(Continued)
TEST
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
Open
Vload
GND
NEW PRODUCT
Vcc
1.5V±0.1V
1.8V±0.15V
2.5V±0.2V
3.3V±0.3V
5V±0.5V
V
I
V
CC
V
CC
V
CC
3V
V
CC
Inputs
t
r
/t
f
≤2ns
≤2ns
≤2ns
≤2.5ns
≤2.5ns
V
M
V
CC
/2
V
CC
/2
V
CC
/2
1.5V
V
CC
/2
C
L
30pF
30pF
30pF
50pF
50pF
R
L
1KΩ
1KΩ
500Ω
500Ω
500Ω
Voltage Waveform Pulse Duration
Voltage Waveform Enable and Disable Times
Low and High Level Enabling
Voltage Waveform Propagation Delay Times
Inverting and Non Inverting Outputs
Notes:
A. Includes test lead and test apparatus capacitance.
B. All pulses are supplied at pulse repetition rate
≤
10 MHz.
C. Inputs are measured separately one transition per measurement.
D. t
PLZ
and t
PHZ
are the same as t
dis.
E. t
PZL
and t
PZH
are the same as t
EN0
F. t
PLH
and t
PHL
are the same as t
PD.
Figure 2. Load Circuit and Voltage Waveforms
74LVCE1G126
Document number: DS32217 Rev. 2 - 2
8 of 14
December 2010
© Diodes Incorporated