DP805x Instructions set details
- 56 -
3.26.3.
MOVX @RI, A
Operation: (PC) ← (PC) + 1
((Ri)) ← (A)
Bytes:
1
Cycles:
4* – if MOVX CODE is executed from on-chip ROM or on-chip RAM,
and destination data are placed inside off-chip XRAM
5* – for all other cases as follow:
CODE inside off-chip XPRG, destination inside off-chip XRAM
CODE inside off-chip XPRG, destination inside off-chip XPRG
CODE inside off-chip XPRG, destination inside on-chip PRG RAM
CODE inside on-chip ROM, destination inside off-chip XPRG
CODE inside on-chip ROM, destination inside on-chip PRG RAM
CODE inside on-chip RAM, destination inside off-chip XPRG
CODE inside on-chip RAM, destination inside on-chip PRG RAM
Encoding:
3.26.4.
1
1
1
1
0
0
1
i
MOVX @DPTR, A
Operation: (PC)
← (PC) + 1
((DPTR)) ← (A)
Bytes:
1
Cycles:
3* – if MOVX CODE is executed from on-chip ROM or on-chip RAM,
and destination data are placed inside off-chip XRAM
4* – for all other cases as listed above
Encoding:
1
1
1
1
0
0
0
0
* MOVX cycles depends on STRETCH register. Shown values with STRETCH=0.
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