DM9161C
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
1. General Description
DAVICOM’s DM9161C is a physical layer, low power,
and single-chip 10BASE-T/100BASE-TX transceiver
specifically designed for consumer electronics, industrial,
and enterprise applications. Through using a CMOS
process, the DM9161C
has the advantage of
ensuring both high performance and savings in
power consumption.
Through utilization of automatic media speed and
protocol selection, the auto-negotiation function is
strongly supported in the DM9161C. Then due to the
built-in wave shaping filter, the DM9161C has a
significant convenience of not requiring an external
filter to transport signals to the media in 10BASE-T or
100BASE-TX during Ethernet operation.
Through its Media Independent Interface (MII), the
DM9161C not only connects the Medium Access
Control (MAC) layer but also ensure a high inter-
operability and flexibility for our different vendors. In
media usage applications, the DM9161C provides a
direct interface either to an Unshielded Twisted Pair
Category 5 Cable (UTP5) for 100BASE-TX Fast
Ethernet, or an UTP5/UTP3 Cable for 10BASE-T
Ethernet. The DM9161C contains the entire physical
layer functions of 100BASE-TX. Those physical layer
functions are defined by IEEE802.3u include the
Physical Coding Sub layer (PCS), Physical Medium
Attachment (PMA), Twisted Pair Physical Medium
Dependent Sub layer (TP-PMD), 10BASE-TX
Encoder/Decoder (ENC/DEC), and Twisted Pair
Media Access Unit (TPMAU).
2. Features
Fully complies with IEEE 802.3 / IEEE 802.3u 10Base-
T/ 100Base-TX, ANSI X3T12 TP-PMD 1995
standards
Support HP MDI/MDI-X auto crossover function
(HP Auto-MDIX)
Support Auto-Negotiation function, compliant with
IEEE 802.3u
Fully integrated Physical layer transceiver On-chip
filtering with direct interface to magnetic transformer
Selectable repeater or node mode
Selectable MII or RMII (Reduced MII) mode for
100Base-TX and 10Base-TX. Selectable MII or
GPSI (7-Wired) mode for 10Base-T
Selectable full-duplex or half-duplex
operation
MII management interface with mask-able interrupt
output capability
Provide Loopback mode for
easy system diagnostics
4
LED status outputs indicate Link/ Activity, Speed10/100
and Full-duplex/Collision. Support Dual-
LED optional control
Single low power Supply of 3.3V with an advanced
CMOS technology, Built in 3.3V to 1.8V
regulator
Lower Power consumption modes:
Power Reduced mode (cable detection)
Power Down mode
Selectable TX drivers for 1:1 or 1.25:1 transformers for
additional power reduction . 1.25: 1 transformers only
when HP Auto-MDIX Disable.
Compatible with 3.3V and 5.0V tolerant I/Os
DM9161CE pin to pin Compatible with DM9161AE /
DM9161BE
DSP architecture PHY Transceiver.
48-pin LQFP - 0.18um process
Final
Version: DM9161C-DS-F01
October 26, 2011
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
