DM9010BI
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
10.3.5 Processor I/O Write Timing
T5
T1
←
→
→
←
,CMD
AEN,SA
T6
←
→
T2
∫∫
T4
IOW
SD
→
→
←
←
T3
←
→
IO16,IO32
Note1.2
T8
→ ←
T7
→ ←
Symbol
T1
Parameter
System Address(SA) valid to IOW# valid
IOW# width
Min.
0
10
3
Typ. Max.
Unit
ns
ns
T2
T3
System Data(SD) setup time
ns
T4
System Data (SD) hold time
3
ns
T5
T6
IOW# invalid to System Address(SA) invalid
IOW# Invalid to next IOW#/IOR# valid
When write DM9010BI INDEX port
IOW# Invalid to next IOW#/IOR# valid
When write DM9010BI DATA port
IOW# valid to next IOW#/IOR# valid
When write DM9010BI memory
0
1
ns
clk*
T6
2
1
clk*
clk*
T2+T6
T7
T8
System Address(SA) valid to IO16, IO32 valid
System Address(SA) invalid to IO16, IO32 invalid
3
3
ns
ns
Note:(The default clk period is 20ns)
1. The IO16 is valid when the SD bus width is 16-bit or
32-bit and system address is DATA port (i.e. CMD
is high) and the value of INDEX port is memory
data register index (ex. F0H, F2H, F6H or F8H)
2. The IO32 is valid when the SD bus width is 32-bit
and system address is DATA port (i.e. CMD is high)
and the value of INDEX port is memory data
Register index (ex. F0H, F2H, F6H or F8H)
Preliminary
49
Version: DM9010BI--DS-P01
January 12, 2010