DM9010BI
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
10.3 AC Electrical Characteristics & Timing Waveforms
10.3.1 TP Interface
Symbol
Parameter
Min.
3.0
0
Typ.
Max.
5.0
0.5
Unit
ns
ns
Conditions
tTR/F
tTM
100TX+/- Differential Rise/Fall Time
100TX+/- Differential Rise/Fall Time
Mismatch
-
-
tTDC
tT/T
100TX+/- Differential Output Duty Cycle
Distortion
100TX+/- Differential Output Peak-to-Peak
Jitter
0
0
0
-
-
-
0.5
1.4
5
ns
ns
%
XOST
100TX+/- Differential Voltage Overshoot
10.3.2 Oscillator/Crystal Timing
Symbol
TCKC
TPWH
TPWL
Parameter
Min.
Typ.
Max.
40.002
24
Unit
ns
ns
Conditions
TCKC
39.998
16
16
40
20
20
50ppm
OSC Pulse Width High
OSC Pulse Width Low
24
ns
10.3.3 Power On Reset Timing
T1
PWRST#
T4
Strap pins
EECS
T2
T3
Symbol
T1
Parameter
PWRST# Low Period
Min.
Typ.
Max.
Unit Conditions
1
40
-
-
-
-
ms
ns
-
-
T2
Strap pin hold time with PWRST#
PWRST# high to EECS high
-
11.31
--
T3
-
us
T4
PWRST# high to EECS burst end
-
3
ms
Note: The DM9010BI needs the time about 3ms to down load the setting from EEPROM after PWRST# deasserted,
During the period, the processor command (IOR#, IOW#, AEN#) pins are not recognized even no EEPROM present. So,
please note that processor only access DM9010BI after PWRST# deasserted 3ms.
Preliminary
47
Version: DM9010BI--DS-P01
January 12, 2010
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
